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[2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id e8-v6sm42176755wmf.22.2018.11.14.14.15.38 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 14 Nov 2018 14:15:38 -0800 (PST) Date: Wed, 14 Nov 2018 22:15:37 +0000 From: Leif Lindholm To: Ard Biesheuvel Cc: "edk2-devel@lists.01.org" , Laszlo Ersek , "Gao, Liming" , "Kinney, Michael D" , Marc Zyngier Message-ID: <20181114221537.4jbrkdlv4fornkgz@bivouac.eciton.net> References: <20181107131301.15852-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH] MdePkg/BaseIoLibIntrinsicArmVirt ARM: avoid double word loads and stores X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 14 Nov 2018 22:15:42 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, Nov 07, 2018 at 02:38:37PM +0100, Ard Biesheuvel wrote: > On 7 November 2018 at 14:13, Ard Biesheuvel wrote: > > BaseIoLibIntrinsicArmVirt was created to prevent LTO from merging > > accesses to MMIO regions, resulting in instructions with multiple > > output registers that KVM on ARM cannot emulate (since the exception > > syndrome information that KVM relies on can only describe a single > > output register) > > > > However, using double word loads on ARM amounts to the same thing, > > and so code that relies on doing 64-bit MMIO to regions that are > > emulated under KVM (such as the GICv3 TYPER register) will still > > suffer from the original issue. > > > > So replace ldrd and strd with equivalent two instruction sequences. > > > > Contributed-under: TianoCore Contribution Agreement 1.1 > > Signed-off-by: Ard Biesheuvel > > Please consider this patch with the hunk below appended Reviewed-by: Leif Lindholm > > --- > > MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S | 6 ++++-- > > 1 file changed, 4 insertions(+), 2 deletions(-) > > > > diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S b/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S > > index 3ad22bd5706d..0d802d6928d6 100644 > > --- a/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S > > +++ b/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S > > @@ -125,7 +125,8 @@ ASM_PFX(MmioWrite32Internal): > > // @return The value read. > > // > > ASM_PFX(MmioRead64Internal): > > - ldrd r0, r1, [r0] > > + ldr r1, [r0, #4] > > + ldr r0, [r0] > > dmb > > bx lr > > > > @@ -141,5 +142,6 @@ ASM_PFX(MmioRead64Internal): > > // > > ASM_PFX(MmioWrite64Internal): > > dmb st > > - strd r2, r3, [r0] > > + str r2, [r0] > > + str r3, [r0, #4] > > bx lr > > diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.asm > b/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.asm > index e1a3d68a430c..deba8c1f0c59 100644 > --- a/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.asm > +++ b/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.asm > @@ -127,7 +127,8 @@ MmioWrite32Internal > ; @return The value read. > ; > MmioRead64Internal > - ldrd r0, r1, [r0] > + ldr r1, [r0, #4] > + ldr r0, [r0] > dmb > bx lr > > @@ -143,7 +144,8 @@ MmioRead64Internal > ; > MmioWrite64Internal > dmb st > - strd r2, r3, [r0] > + str r2, [r0] > + str r3, [r0, #4] > bx lr > > END