From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::342; helo=mail-wm1-x342.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm1-x342.google.com (mail-wm1-x342.google.com [IPv6:2a00:1450:4864:20::342]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 282E02194D3AE for ; Mon, 19 Nov 2018 11:32:04 -0800 (PST) Received: by mail-wm1-x342.google.com with SMTP id k198so5997609wmd.3 for ; Mon, 19 Nov 2018 11:32:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=ex96aGk6bC2ie7ndglwTxABTCmVI8unyFiDGJaW4XQo=; b=Qw5yGF7SIoROD4yBsr8LRObWEO982yW3KlRF46MWEBBf6z/PEqff9BO78BEkOaWmcF WulKh32/6T5sEL+9eU7beeLOimBZhYPQ5onwfvQQdV6EpgEfSUaPEdxC4XAjoFvUzbUG MCJ6K8yPDCiMzbz7PuYE/RscTUXNHpdtFn3qk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=ex96aGk6bC2ie7ndglwTxABTCmVI8unyFiDGJaW4XQo=; b=INru6Fq+6RNYCDo3VaQqr13qxGAbgsyQW4qsGdPB8HhLrywd4b9/7UdZEtOQxt1Is3 f2KEjnzqaNO/MGjh+XAAnlqZXnFmY4pVnWKQpwACtAQLwnMw5BGQ4rjLQL9HMtvFHeqF E0PIWjeSvIYx4z1qHIJyC3v02AuVg8MrX1zeJot5g2tRx61ZaQOXkbrMVNqCXJ5p92/h 7HVB+1BpOfbS0OdGUqd2UNC13av2nNLSysSTa/bnYXiv2ymrw8v/Q5g6riWqfIJYHXy0 VYwHBJXRvWXZmFm1s3HhRjyfSbB3B93paPAUPZzXIEQLLnSu9J3gMze0Djr29hjhTFOW oTsQ== X-Gm-Message-State: AA+aEWaXZUjVO+Ov6vVz2nG7amuJSiEy6JZCPffIezAP34lHjSg0v7n8 s4Ke0YTK5DaCmSrRWsczC1LxTg== X-Google-Smtp-Source: AFSGD/VnQqYZbeu0+A4Iwk11bNxnU1RrIFtdXpUB5B0TTmySPepqhaP/KsJkIiCYFvRcTNIoy2xGwQ== X-Received: by 2002:a1c:5448:: with SMTP id p8mr8512924wmi.124.1542655922700; Mon, 19 Nov 2018 11:32:02 -0800 (PST) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id i16sm22872849wmd.28.2018.11.19.11.32.01 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 19 Nov 2018 11:32:01 -0800 (PST) Date: Mon, 19 Nov 2018 19:31:59 +0000 From: Leif Lindholm To: Ard Biesheuvel Cc: "edk2-devel@lists.01.org" , Laszlo Ersek , Philippe =?iso-8859-1?Q?Mathieu-Daud=E9?= , Hongbo Zhang Message-ID: <20181119193159.vityo5df3rmm4doh@bivouac.eciton.net> References: <20181117004524.31851-1-ard.biesheuvel@linaro.org> <20181117004524.31851-3-ard.biesheuvel@linaro.org> <20181119191044.4uqakfz5dfmxdctz@bivouac.eciton.net> <20181119192456.67cvm64mhvqyyquc@bivouac.eciton.net> MIME-Version: 1.0 In-Reply-To: User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH 2/2] ArmVirtPkg/NorFlashQemuLib: discover NOR flash banks dynamically X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 19 Nov 2018 19:32:04 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Mon, Nov 19, 2018 at 11:27:22AM -0800, Ard Biesheuvel wrote: > > > > > > In this case, NorFlashQemuLib should not expose the first flash bank > > > > > > at all. > > > > > > > > > > > > To prevent introducing too much internal knowledge about which flash > > > > > > bank is accessible under which circumstances, let's switch to using > > > > > > the DTB to decide which flash banks to expose to the NOR flash driver. > > > > > > > > Does this mean we as a side effect get rid of the limitation that the > > > > pflash image needs to be exactly 64MB. Or does that require further > > > > changes on the QEMU side? > > > > > > No that is a QEMU thing. > > > > OK, thanks for confirming. > > But this should mean that we don't need any changes on the guest sides > > if/when we do fix this in QEMU? > > This would indeed get rid of any discrepancies between what QEMU > exposes and what the firmware assumes, so yes, it's an improvement in > that sense. However, I don't think the QEMU side of this is likely to > change any time soon. Sure. But it does decrease the amount of reward delay required for someone to consider having a look at it :) Thanks! / Leif