From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::443; helo=mail-pf1-x443.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf1-x443.google.com (mail-pf1-x443.google.com [IPv6:2607:f8b0:4864:20::443]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 705CC21191724 for ; Tue, 20 Nov 2018 01:02:15 -0800 (PST) Received: by mail-pf1-x443.google.com with SMTP id c73so664654pfe.13 for ; Tue, 20 Nov 2018 01:02:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=qHgXEzB9ahrTocGNY1SLCUze+iF5zDKN78fX7sTYTWA=; b=AaYumOD5BfNv7LLe7lgdMrCB7Vk1r0QhSw47mayoqNCOQb1EunEAcnVNfqnNUfedd7 Q61S9U4J8isqzpHiYhmCP7P0JWR3f8FdR9eI9xLdmaR0TvP0QAmFIECnrUarcx2Qx/IS 5Bv46xU4ftohlH6GXKs+006j7+loxvYwE3RXk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=qHgXEzB9ahrTocGNY1SLCUze+iF5zDKN78fX7sTYTWA=; b=q4b/Q9Kal/d84Cb3wdaE4XIBQCf8YhpAQ3pNQ2on7sO5Jke1WBoHFQL+xFmsTl5AvU mFDoJIHlPllA2cb97GCVB6clK6UWk5o4u1dD10MLUAYY4QqwmOsygCMvSgD/4u8gBUx+ EWa48rnfFBiZgn6OvxREoLhpTVeEA3oPLhehOgfz1paHNdehmMqBbbE/rmyqumTjbNDB S45+Ti7Q2DoAnOfH7OYdRhZ7eUJGSb2NgdT8neb6S6U+ggY+4xIWhnghht1AznaV0bMo SiVe3Rme+40B1Ztc0bxA+q+OR9z95dTwR9ksNVjA+0RSP3FL50ACOsVV66rfz3sA4OMI FkrQ== X-Gm-Message-State: AA+aEWYQKNezzQiZF2hW47RNE8QwciSLfDIlrlVYyp8ghg5Kmze0GZDR 7evH4VgqYCzvV12ln9CNsHnB1Q== X-Google-Smtp-Source: AFSGD/VRm/vekxCfNX1QPnTyzl84Mv6/YV3mBSdbPHyk1K0n1Sk+z70V6bZUoKohn84nHvPMEGgiiA== X-Received: by 2002:a63:396:: with SMTP id 144mr1183925pgd.68.1542704535004; Tue, 20 Nov 2018 01:02:15 -0800 (PST) Received: from localhost.localdomain ([114.119.4.74]) by smtp.gmail.com with ESMTPSA id f13sm24151250pfa.132.2018.11.20.01.02.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 20 Nov 2018 01:02:14 -0800 (PST) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Cc: ard.biesheuvel@linaro.org, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, john.garry@huawei.com, xinliang.liu@linaro.org, zhangfeng56@huawei.com, Ming Huang Date: Tue, 20 Nov 2018 17:01:50 +0800 Message-Id: <20181120090150.1102-6-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20181120090150.1102-1-ming.huang@linaro.org> References: <20181120090150.1102-1-ming.huang@linaro.org> Subject: [PATCH edk2-platforms v3 5/5] Hisilicon/D06: Move some functions to OemMiscLib X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 20 Nov 2018 09:02:15 -0000 As M41T83RealTimeClockLib is common library, so move two platform specific functions to OemMiscLib and rename this two functions. Main gist of this patch is making this library as a common module in Hisilicon. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf | 2 - Silicon/Hisilicon/Include/Library/OemMiscLib.h | 9 ++ Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h | 4 - Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c | 82 ++++++++++++++++++ Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c | 90 ++------------------ 5 files changed, 98 insertions(+), 89 deletions(-) diff --git a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf index e0bf6b3f24db..7bbba5389737 100644 --- a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf +++ b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf @@ -27,12 +27,10 @@ [Sources.common] [Packages] EmbeddedPkg/EmbeddedPkg.dec MdePkg/MdePkg.dec - Platform/Hisilicon/D06/D06.dec Silicon/Hisilicon/HisiPkg.dec [LibraryClasses] BaseMemoryLib - CpldIoLib DebugLib I2CLib IoLib diff --git a/Silicon/Hisilicon/Include/Library/OemMiscLib.h b/Silicon/Hisilicon/Include/Library/OemMiscLib.h index 86ea6a1b3deb..0d7bf71b17d2 100644 --- a/Silicon/Hisilicon/Include/Library/OemMiscLib.h +++ b/Silicon/Hisilicon/Include/Library/OemMiscLib.h @@ -53,4 +53,13 @@ BOOLEAN OemIsNeedDisableExpanderBuffer(VOID); extern EFI_STRING_ID gDimmToDevLocator[MAX_SOCKET][MAX_CHANNEL][MAX_DIMM]; EFI_HII_HANDLE EFIAPI OemGetPackages (); + +VOID +OemReleaseOwnershipOfRtc ( + VOID + ); +EFI_STATUS +OemSwitchRtcI2cChannelAndLock ( + VOID + ); #endif diff --git a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h index d985055d9bb6..f32910885856 100644 --- a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h +++ b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h @@ -17,11 +17,7 @@ #define __M41T83_REAL_TIME_CLOCK_H__ // The delay is need for cpld and I2C. This is a empirical value. MemoryFence is no need. -#define RTC_DELAY_30_MS 30000 -// The delay is need for cpld and I2C. This is a empirical value. MemoryFence is no need. #define RTC_DELAY_1000_MACROSECOND 1000 -// The delay is need for cpld and I2C. This is a empirical value. MemoryFence is no need. -#define RTC_DELAY_2_MACROSECOND 2 #define M41T83_REGADDR_DOTSECONDS 0x00 #define M41T83_REGADDR_SECONDS 0x01 diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c index 2a9db46d1ff9..64d167d18ae6 100644 --- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c +++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -27,6 +28,12 @@ #include #include #include +#include + +// The delay is need for cpld and I2C. This is a empirical value. MemoryFence is no need. +#define RTC_DELAY_30_MS 30000 +// The delay is need for cpld and I2C. This is a empirical value. MemoryFence is no need. +#define RTC_DELAY_2_MACROSECOND 2 REPORT_PCIEDIDVID2BMC PcieDeviceToReport[PCIEDEVICE_REPORT_MAX] = { {67,0,0,0}, @@ -207,3 +214,78 @@ OemIsNeedDisableExpanderBuffer ( { return TRUE; } + +EFI_STATUS +OemSwitchRtcI2cChannelAndLock ( + VOID + ) +{ + UINT8 Temp; + UINT8 Count; + + for (Count = 0; Count < 100; Count++) { + // To get the other side's state is idle first + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); + if ((Temp & BIT3) != 0) { + (VOID) MicroSecondDelay (RTC_DELAY_30_MS); + // Try 100 times, if BMC has not released the bus, return preemption failed + if (Count == 99) { + if (!EfiAtRuntime ()) { + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Clear cpu_i2c_rtc_state 100 times fail!\n", + __FUNCTION__, __LINE__)); + } + return EFI_DEVICE_ERROR; + } + continue; + } + + // if BMC free the bus, can be set 1 preemption + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); + Temp = Temp | CPU_GET_I2C_CONTROL; + // CPU occupied RTC I2C State + WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp); + (VOID) MicroSecondDelay (RTC_DELAY_2_MACROSECOND); + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); + // Is preempt success + if(CPU_GET_I2C_CONTROL == (Temp & CPU_GET_I2C_CONTROL)) { + break; + } + if (Count == 99) { + if (!EfiAtRuntime ()) { + DEBUG((DEBUG_ERROR, "[%a]:[%dL] Clear cpu_i2c_rtc_state fail !!! \n", + __FUNCTION__, __LINE__)); + } + return EFI_DEVICE_ERROR; + } + (VOID) MicroSecondDelay (RTC_DELAY_30_MS); + } + + //Polling BMC RTC I2C status + for (Count = 0; Count < 100; Count++) { + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); + if ((Temp & BIT3) == 0) { + return EFI_SUCCESS; + } + (VOID) MicroSecondDelay (RTC_DELAY_30_MS); + } + + //If the BMC occupies the RTC I2C Channel, write back the CPU side is idle + // or the subsequent BMC will not preempt + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); + Temp = Temp & (~CPU_GET_I2C_CONTROL); + WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp); + + return EFI_NOT_READY; +} + +VOID +OemReleaseOwnershipOfRtc ( + VOID + ) +{ + UINT8 Temp; + + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); + Temp = Temp & ~CPU_GET_I2C_CONTROL; + WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp); +} diff --git a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c index 0670f9c5f47c..1f50ad4b64c4 100644 --- a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c +++ b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c @@ -17,10 +17,10 @@ #include #include #include -#include #include #include #include +#include #include #include #include @@ -32,70 +32,6 @@ extern I2C_DEVICE gRtcDevice; STATIC EFI_LOCK mRtcLock; -EFI_STATUS -SwitchRtcI2cChannelAndLock ( - VOID - ) -{ - UINT8 Temp; - UINT8 Count; - - for (Count = 0; Count < 100; Count++) { - // To get the other side's state is idle first - Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); - if ((Temp & BIT3) != 0) { - (VOID) MicroSecondDelay (RTC_DELAY_30_MS); - // Try 100 times, if BMC has not released the bus, return preemption failed - if (Count == 99) { - if (!EfiAtRuntime ()) { - DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Clear cpu_i2c_rtc_state 100 times fail!\n", - __FUNCTION__, __LINE__)); - } - return EFI_DEVICE_ERROR; - } - continue; - } - - // if BMC free the bus, can be set 1 preemption - Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); - Temp = Temp | CPU_GET_I2C_CONTROL; - // CPU occupied RTC I2C State - WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp); - (VOID) MicroSecondDelay (RTC_DELAY_2_MACROSECOND); - Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); - // Is preempt success - if(CPU_GET_I2C_CONTROL == (Temp & CPU_GET_I2C_CONTROL)) { - break; - } - if (Count == 99) { - if (!EfiAtRuntime ()) { - DEBUG((DEBUG_ERROR, "[%a]:[%dL] Clear cpu_i2c_rtc_state fail !!! \n", - __FUNCTION__, __LINE__)); - } - return EFI_DEVICE_ERROR; - } - (VOID) MicroSecondDelay (RTC_DELAY_30_MS); - } - - //Polling BMC RTC I2C status - for (Count = 0; Count < 100; Count++) { - Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); - if ((Temp & BIT3) == 0) { - return EFI_SUCCESS; - } - (VOID) MicroSecondDelay (RTC_DELAY_30_MS); - } - - //If the BMC occupies the RTC I2C Channel, write back the CPU side is idle - // or the subsequent BMC will not preempt - Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); - Temp = Temp & (~CPU_GET_I2C_CONTROL); - WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp); - - return EFI_NOT_READY; -} - - /** Read RTC content through its registers. @@ -142,18 +78,6 @@ RtcWrite ( return Status; } -VOID -ReleaseOwnershipOfRtc ( - VOID - ) -{ - UINT8 Temp; - - Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); - Temp = Temp & ~CPU_GET_I2C_CONTROL; - WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp); -} - EFI_STATUS InitializeM41T83 ( @@ -178,7 +102,7 @@ InitializeM41T83 ( return Status; } - Status = SwitchRtcI2cChannelAndLock (); + Status = OemSwitchRtcI2cChannelAndLock (); if (EFI_ERROR (Status)) { DEBUG ((DEBUG_ERROR, "Get i2c preemption failed: %r\n", Status)); if (!EfiAtRuntime ()) { @@ -231,7 +155,7 @@ InitializeM41T83 ( Exit: // Release RTC Lock. - ReleaseOwnershipOfRtc (); + OemReleaseOwnershipOfRtc (); if (!EfiAtRuntime ()) { EfiReleaseLock (&mRtcLock); } @@ -274,7 +198,7 @@ LibSetTime ( return EFI_INVALID_PARAMETER; } - Status = SwitchRtcI2cChannelAndLock (); + Status = OemSwitchRtcI2cChannelAndLock (); if (EFI_ERROR (Status)) { return Status; } @@ -332,7 +256,7 @@ LibSetTime ( } Exit: - ReleaseOwnershipOfRtc (); + OemReleaseOwnershipOfRtc (); // Release RTC Lock. if (!EfiAtRuntime ()) { if (EFI_ERROR (Status)) { @@ -377,7 +301,7 @@ LibGetTime ( return EFI_INVALID_PARAMETER; } - Status = SwitchRtcI2cChannelAndLock (); + Status = OemSwitchRtcI2cChannelAndLock (); if (EFI_ERROR (Status)) { return Status; } @@ -422,7 +346,7 @@ LibGetTime ( } Exit: - ReleaseOwnershipOfRtc (); + OemReleaseOwnershipOfRtc (); // Release RTC Lock. if (!EfiAtRuntime ()) { if (EFI_ERROR (Status)) { -- 2.9.5