From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.31; helo=mga06.intel.com; envelope-from=chasel.chiu@intel.com; receiver=edk2-devel@lists.01.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 05D4E211944BF for ; Wed, 21 Nov 2018 19:51:43 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 21 Nov 2018 19:51:43 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,263,1539673200"; d="scan'208";a="108327690" Received: from cchiu4-mobl1.gar.corp.intel.com ([10.5.240.28]) by fmsmga004.fm.intel.com with ESMTP; 21 Nov 2018 19:51:42 -0800 From: "Chasel, Chiu" To: edk2-devel@lists.01.org Cc: Jiewen Yao , Desimone Nathaniel L , Wu Hao A , Chasel Chiu Date: Thu, 22 Nov 2018 11:51:02 +0800 Message-Id: <20181122035103.16940-2-chasel.chiu@intel.com> X-Mailer: git-send-email 2.13.3.windows.1 In-Reply-To: <20181122035103.16940-1-chasel.chiu@intel.com> References: <20181122035103.16940-1-chasel.chiu@intel.com> Subject: [PATCH v2 1/2] IntelFsp2WrapperPkg: Fix line ending format issue X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 Nov 2018 03:51:44 -0000 REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1352 Fixed line ending format wrong issues on some files. Test: Verified building successfully. Cc: Jiewen Yao Cc: Desimone Nathaniel L Cc: Wu Hao A Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chasel Chiu --- IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c | 32 ++++++++++++++++---------------- IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c | 24 ++++++++++++------------ IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf | 4 ++-- IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf | 4 ++-- IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec | 22 +++++++++++----------- 5 files changed, 43 insertions(+), 43 deletions(-) diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c index e25854c080..fa0441ce6c 100644 --- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c @@ -3,7 +3,7 @@ register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi notify to call FspSiliconInit API. - Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.
+ Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at @@ -65,7 +65,7 @@ PeiFspMemoryInit ( FspHobListPtr = NULL; FspmUpdDataPtr = NULL; - FspmHeaderPtr = (FSP_INFO_HEADER *) FspFindFspHeader (PcdGet32 (PcdFspmBaseAddress)); + FspmHeaderPtr = (FSP_INFO_HEADER *) FspFindFspHeader (PcdGet32 (PcdFspmBaseAddress)); DEBUG ((DEBUG_INFO, "FspmHeaderPtr - 0x%x\n", FspmHeaderPtr)); if (FspmHeaderPtr == NULL) { return EFI_DEVICE_ERROR; @@ -155,20 +155,20 @@ FspmWrapperInit ( { EFI_STATUS Status; - Status = EFI_SUCCESS; - - if (FixedPcdGet8 (PcdFspModeSelection) == 1) { - Status = PeiFspMemoryInit (); - ASSERT_EFI_ERROR (Status); - } else { - PeiServicesInstallFvInfoPpi ( - NULL, - (VOID *)(UINTN) PcdGet32 (PcdFspmBaseAddress), - (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32 (PcdFspmBaseAddress))->FvLength, - NULL, - NULL - ); - } + Status = EFI_SUCCESS; + + if (FixedPcdGet8 (PcdFspModeSelection) == 1) { + Status = PeiFspMemoryInit (); + ASSERT_EFI_ERROR (Status); + } else { + PeiServicesInstallFvInfoPpi ( + NULL, + (VOID *)(UINTN) PcdGet32 (PcdFspmBaseAddress), + (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32 (PcdFspmBaseAddress))->FvLength, + NULL, + NULL + ); + } return Status; } diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c index 69cf568380..87dd61e5c5 100644 --- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c +++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c @@ -3,7 +3,7 @@ register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi notify to call FspSiliconInit API. - Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.
+ Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at @@ -349,17 +349,17 @@ FspsWrapperPeimEntryPoint ( { DEBUG ((DEBUG_INFO, "FspsWrapperPeimEntryPoint\n")); - if (FixedPcdGet8 (PcdFspModeSelection) == 1) { - FspsWrapperInit (); - } else { - PeiServicesInstallFvInfoPpi ( - NULL, - (VOID *)(UINTN) PcdGet32 (PcdFspsBaseAddress), - (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32 (PcdFspsBaseAddress))->FvLength, - NULL, - NULL - ); - } + if (FixedPcdGet8 (PcdFspModeSelection) == 1) { + FspsWrapperInit (); + } else { + PeiServicesInstallFvInfoPpi ( + NULL, + (VOID *)(UINTN) PcdGet32 (PcdFspsBaseAddress), + (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32 (PcdFspsBaseAddress))->FvLength, + NULL, + NULL + ); + } return EFI_SUCCESS; } diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf index f4b7ef8db6..b3776a80f3 100644 --- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf @@ -6,7 +6,7 @@ # register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi # notify to call FspSiliconInit API. # -# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.
+# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.
# # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License @@ -61,7 +61,7 @@ [Pcd] gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress ## CONSUMES gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress ## CONSUMES - gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection ## CONSUMES + gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection ## CONSUMES [Sources] FspmWrapperPeim.c diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf index 1e63f407cb..910286982b 100644 --- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf +++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf @@ -6,7 +6,7 @@ # register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi # notify to call FspSiliconInit API. # -# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.
+# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.
# # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License @@ -68,7 +68,7 @@ [Pcd] gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress ## CONSUMES gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress ## CONSUMES - gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection ## CONSUMES + gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection ## CONSUMES [Guids] gFspHobGuid ## CONSUMES ## HOB diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec index b901562bb3..96f2858fb4 100644 --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec @@ -71,7 +71,7 @@ ## Indicate the PEI memory size platform want to report gIntelFsp2WrapperTokenSpaceGuid.PcdPeiRecoveryMinMemSize|0x3000000|UINT32|0x40000005 - ## This is the base address of FSP-T + ## This is the base address of FSP-T gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0x00000000|UINT32|0x00000300 ## This PCD indicates if FSP APIs are skipped from FSP wrapper.

@@ -92,17 +92,17 @@ # @Prompt Skip FSP API from FSP wrapper. gIntelFsp2WrapperTokenSpaceGuid.PcdSkipFspApi|0x00000000|UINT32|0x40000009 - ## This PCD decides how Wrapper code utilizes FSP - # 0: DISPATCH mode (FSP Wrapper will load PeiCore from FSP without calling FSP API) - # 1: API mode (FSP Wrapper will call FSP API) - # - gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|0x00000001|UINT8|0x4000000A - + ## This PCD decides how Wrapper code utilizes FSP + # 0: DISPATCH mode (FSP Wrapper will load PeiCore from FSP without calling FSP API) + # 1: API mode (FSP Wrapper will call FSP API) + # + gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|0x00000001|UINT8|0x4000000A + [PcdsFixedAtBuild, PcdsPatchableInModule,PcdsDynamic,PcdsDynamicEx] - # - ## These are the base address of FSP-M/S - # - gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT32|0x00001000 + # + ## These are the base address of FSP-M/S + # + gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT32|0x00001000 gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0x00000000|UINT32|0x00001001 # # To provide flexibility for platform to pre-allocate FSP UPD buffer -- 2.13.3.windows.1