From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::443; helo=mail-wr1-x443.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr1-x443.google.com (mail-wr1-x443.google.com [IPv6:2a00:1450:4864:20::443]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 607B621959CB2 for ; Tue, 27 Nov 2018 06:54:27 -0800 (PST) Received: by mail-wr1-x443.google.com with SMTP id x10so22998008wrs.8 for ; Tue, 27 Nov 2018 06:54:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gkqtH8+TibHs1zm2jVfz/GOZsyv6unLfbIu0+TLWcNs=; b=DcKwKKRH7akbtLumFkYKyO4m5iFrfNIB2UpxUjve0DaLYQZo67TKsz3qFXNZKQoq0K uE2O4T2maafw1mksQKSzIrK+nT0snMi89yzAUn5AruKxbT7UUBYJEtLnphj1qMn3vmhM KNkxKKzv/lvq0dTliKfNZzf+tJ1uXXdTTErxI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gkqtH8+TibHs1zm2jVfz/GOZsyv6unLfbIu0+TLWcNs=; b=fyMtPwgd44/vgBddCHQeeDYNvyCmq792Ca7ZF0KTHreaE0G6aJAQnugE3ThgkhnInE 4LVEh5RKg49FwoKmDg0C19c1XmOBOUxMl+7ueDTmRZf9ZKlsBjWZJFLxba+JidHWAhNr fb/RZvjBGs++22yJq7jgrNkNUSmg+gVfBNs3WAR9awvVYVLJxdPJHkXZ9DIYsSP/CVry JB/wxuar6bxwoEUS6cWLfuD9L4BQYwZaqTGfsqaTmUxv6z7PjtBsIww6dqzgFCe9gC2q cVk1pR91uGIuxRkTdKqaOlF/2XngOT1+5G1k2pK0J3CppOPWZZWjyBqcJkrhOUKzBLf1 vHYw== X-Gm-Message-State: AA+aEWZxp2n9fEz8mr0AqV47LsbfywHvmYQ8mpDj5RetAJlnQ5KR/4HX w7lz1YL/8KKw8F0BPK5dimmFliQ9CY4= X-Google-Smtp-Source: AFSGD/XwY4XXfFX+XYz9sBhESvjOyK5lsWmrTkBD9DcERTnlqLGp61N3ASQ0YEtC1IfSXNNpT7h4sQ== X-Received: by 2002:adf:f5d1:: with SMTP id k17mr29865290wrp.59.1543330465606; Tue, 27 Nov 2018 06:54:25 -0800 (PST) Received: from harold.home ([2a01:cb1d:112:6f00:f523:5d63:a56a:3d76]) by smtp.gmail.com with ESMTPSA id v19sm4828490wrd.46.2018.11.27.06.54.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 27 Nov 2018 06:54:24 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Cc: Ard Biesheuvel , Laszlo Ersek , Eric Auger , Andrew Jones , Philippe Mathieu-Daude Date: Tue, 27 Nov 2018 15:54:18 +0100 Message-Id: <20181127145418.11992-3-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181127145418.11992-1-ard.biesheuvel@linaro.org> References: <20181127145418.11992-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Subject: [PATCH v2 2/2] ArmVirtPkg/QemuVirtMemInfoLib: remove 1:1 mapping of top of PA range X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 27 Nov 2018 14:54:27 -0000 Content-Transfer-Encoding: 8bit Currently, we map DRAM as EFI_MEMORY_WB, and the remainder of the entire virtual address space is mapped with EFI_MEMORY_UC attributes, regardless of whether any devices actually reside there. Now that we are relaxing the address space limit to more than 40 bits, mapping all that address space actually takes up more space in page tables than we have so far made available as temporary RAM. So let's get rid of the mapping rather than increasing the available RAM, given that the mapping is not particularly useful anyway. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c | 17 +++++------------ 1 file changed, 5 insertions(+), 12 deletions(-) diff --git a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c index 815ca145b644..70863abb2e7b 100644 --- a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c +++ b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c @@ -73,21 +73,14 @@ ArmVirtGetMemoryMap ( VirtualMemoryTable[1].Length = VirtualMemoryTable[0].PhysicalBase; VirtualMemoryTable[1].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; - // Peripheral space after DRAM - VirtualMemoryTable[2].PhysicalBase = VirtualMemoryTable[0].Length + VirtualMemoryTable[1].Length; - VirtualMemoryTable[2].VirtualBase = VirtualMemoryTable[2].PhysicalBase; - VirtualMemoryTable[2].Length = TopOfAddressSpace - - VirtualMemoryTable[2].PhysicalBase; - VirtualMemoryTable[2].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; - // Remap the FD region as normal executable memory - VirtualMemoryTable[3].PhysicalBase = PcdGet64 (PcdFdBaseAddress); - VirtualMemoryTable[3].VirtualBase = VirtualMemoryTable[3].PhysicalBase; - VirtualMemoryTable[3].Length = FixedPcdGet32 (PcdFdSize); - VirtualMemoryTable[3].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK; + VirtualMemoryTable[2].PhysicalBase = PcdGet64 (PcdFdBaseAddress); + VirtualMemoryTable[2].VirtualBase = VirtualMemoryTable[2].PhysicalBase; + VirtualMemoryTable[2].Length = FixedPcdGet32 (PcdFdSize); + VirtualMemoryTable[2].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK; // End of Table - ZeroMem (&VirtualMemoryTable[4], sizeof (ARM_MEMORY_REGION_DESCRIPTOR)); + ZeroMem (&VirtualMemoryTable[3], sizeof (ARM_MEMORY_REGION_DESCRIPTOR)); *VirtualMemoryMap = VirtualMemoryTable; } -- 2.19.1