From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::342; helo=mail-wm1-x342.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm1-x342.google.com (mail-wm1-x342.google.com [IPv6:2a00:1450:4864:20::342]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id D8B7B2119680A for ; Thu, 29 Nov 2018 07:43:07 -0800 (PST) Received: by mail-wm1-x342.google.com with SMTP id s14so2760486wmh.1 for ; Thu, 29 Nov 2018 07:43:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=I/KHhABz61JHme7Yt/8NspqOJZLiqHEkqOk88OqKM+E=; b=g+O9PgvslYg6lW67UCHbunOIO+lEebOHd+YAg6yIJtkrG7NYNk2ytr769kYqSm8vBM zl4yTH5WRZNZ2oDpjULMY/Ce81ilrUcqm9eVHhyO7uHj1ia26USAKNH5bi1GCyx+xmwI 4XdzZKCHx8NvABqEeMkTJOm7Qx0xM3gQoLqv8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=I/KHhABz61JHme7Yt/8NspqOJZLiqHEkqOk88OqKM+E=; b=OSVG0omPBGAK2+DsMBZy3OdwDBEj8l5/FYD4nf0NiLtyVSWf1p6kYO1JPf8H0OOYG6 jNXpwZNLl54e7pu7ilbch+Y7xz7Y5QgTlo/ZRE+b2sVV+WCTKGL71DtKpGlbUuOv4KmX VZXIZyt8RLPiJW8kvI/SFRoiyJTVoZ+590iTDKx+rhhnN+4dHjVaDNYVvzUyEXiIGNnL mu4wz0jOPmSBMsiuDlrbScgpmRqAExkqC7pTjUnnZPQdap3glE7CBrX440umMNM15/mO pj27ijgCPW4VG6IYexKCBWaACjZ6xne3ntACf321sAaCnZ6G6y/c20lTvrvbgOJoTiL0 /Jtw== X-Gm-Message-State: AA+aEWapeOjmxvq1uU4/B9B9qUpMh4ejHbE6eEXHw4RXYI/mZ2AbAdoJ Q4sMSVzOPfhf4/Qu/kz3BU/NUw== X-Google-Smtp-Source: AFSGD/Vw5LLJRDUipvbQCEovvbH5BU2Id4Zd/Tbda0v6ydtvM9fIKAup87YTIAIvf/9d8mNuay4ZIw== X-Received: by 2002:a7b:ce84:: with SMTP id q4mr2315385wmj.105.1543506186301; Thu, 29 Nov 2018 07:43:06 -0800 (PST) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id c12sm1571801wrs.82.2018.11.29.07.43.05 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 29 Nov 2018 07:43:05 -0800 (PST) Date: Thu, 29 Nov 2018 15:43:03 +0000 From: Leif Lindholm To: Ard Biesheuvel Cc: edk2-devel@lists.01.org, Laszlo Ersek , Eric Auger , Andrew Jones , Philippe Mathieu-Daude , Julien Grall Message-ID: <20181129154303.qggk2ugywxpsgmqv@bivouac.eciton.net> References: <20181128143357.991-1-ard.biesheuvel@linaro.org> <20181128143357.991-9-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: <20181128143357.991-9-ard.biesheuvel@linaro.org> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH v3 08/16] ArmPkg/ArmMmuLib: take the CPU supported maximum PA space into account X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 29 Nov 2018 15:43:08 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, Nov 28, 2018 at 03:33:49PM +0100, Ard Biesheuvel wrote: > In preparation of dropping PcdPrePiCpuMemorySize entirely, base the > maximum size of the identity map on the capabilities of the CPU. > Since that may exceed what is architecturally permitted when using > 4 KB pages, take MAX_ADDRESS into account as well. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm > --- > ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf | 3 --- > ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf | 3 --- > ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 11 +++++++++-- > 3 files changed, 9 insertions(+), 8 deletions(-) > > diff --git a/ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf b/ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf > index b9f264de8d26..246963361e45 100644 > --- a/ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf > +++ b/ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf > @@ -40,8 +40,5 @@ [LibraryClasses] > CacheMaintenanceLib > MemoryAllocationLib > > -[Pcd.AARCH64] > - gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize > - > [Pcd.ARM] > gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride > diff --git a/ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf b/ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf > index ecf13f790734..f689c193b862 100644 > --- a/ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf > +++ b/ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf > @@ -35,6 +35,3 @@ [LibraryClasses] > ArmLib > CacheMaintenanceLib > MemoryAllocationLib > - > -[Pcd.AARCH64] > - gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize > diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c > index 4b62ecb6a476..5403b8d4070e 100644 > --- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c > +++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c > @@ -604,8 +604,15 @@ ArmConfigureMmu ( > return EFI_INVALID_PARAMETER; > } > > - // Cover the entire GCD memory space > - MaxAddress = (1UL << PcdGet8 (PcdPrePiCpuMemorySize)) - 1; > + // > + // Limit the virtual address space to what we can actually use: UEFI > + // mandates a 1:1 mapping, so no point in making the virtual address > + // space larger than the physical address space. We also have to take > + // into account the architectural limitations that result from UEFI's > + // use of 4 KB pages. > + // > + MaxAddress = MIN (LShiftU64 (1ULL, ArmGetPhysicalAddressBits ()) - 1, > + MAX_ADDRESS); > > // Lookup the Table Level to get the information > LookupAddresstoRootTable (MaxAddress, &T0SZ, &RootTableEntryCount); > -- > 2.19.1 >