From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::342; helo=mail-wm1-x342.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm1-x342.google.com (mail-wm1-x342.google.com [IPv6:2a00:1450:4864:20::342]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 38C1021CAD998 for ; Fri, 30 Nov 2018 03:28:38 -0800 (PST) Received: by mail-wm1-x342.google.com with SMTP id a18so5369732wmj.1 for ; Fri, 30 Nov 2018 03:28:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=MJ/ZzR1ylqeOzeN1tiHAk13ATMWys8ZBmKY7NZRfF/I=; b=aON6NwC8afurOD/n52RUoDwjsRql6jcLP6eXWAEYT3g2W45X4dk+KnP0n26BgLNkkj bRtUEzIrLHxYmLL38NrK4Iivvaa/vsVXclv/xCw7oAP870yrQ/oLzKrcb3Wc4w2RXVP8 G80yLokMT0qZwmQN/+Y5h9fyRw7g3HYic7kVU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=MJ/ZzR1ylqeOzeN1tiHAk13ATMWys8ZBmKY7NZRfF/I=; b=TMbLmS+vqQ2hSk9ug3V8N3c0N4OoXU8sEVgxH2lmZ6vIjogn2F2rXm43rp6pJRrnRR a3se9T4qBeqmODZp63U4GP9LJJbKaZBlPFxNvpJB8B1x/NKIo/q/rmkwg2rhg+rOhjBE daNBQMQ3EpDA2qlL5UhtU0q36Wf1FHdhiw9ge2dSSAfgEjqy5Ayq5Hm7s01aMY4rXESW xIQacCzq65ojeM1p2BTYzjM7OPJ3yP+GhBUl/RqlwFm3qyiMozyoIeR1kXZvj5sCFX2d oN7+Qe38NOZGQs9OPPv0//xBkfJqdRyRum7cuDe/TTsFLleCAz9R1Hgt8VoWCWhnHO7K 0SjA== X-Gm-Message-State: AA+aEWYZdVa1Twfg5Mz1Y+C0BjrFybs6BKY5+ziK5IV/lYGnAeGpWOV/ gIyNS8ZwKc95gOxg0xFGlPo7Jzqe2Dc= X-Google-Smtp-Source: AFSGD/X2hrJ7e+VK+RoetWzqJiiDRxv58wwkqfhDjIsR+Adaw1RyU1w8g9+Z7ijsUqVWdyZyJI1gkg== X-Received: by 2002:a7b:c218:: with SMTP id x24mr1576929wmi.58.1543577316476; Fri, 30 Nov 2018 03:28:36 -0800 (PST) Received: from harold.home ([2a01:cb1d:112:6f00:f070:d240:312e:9f99]) by smtp.gmail.com with ESMTPSA id h16sm4340570wrs.60.2018.11.30.03.28.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 30 Nov 2018 03:28:35 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Cc: Ard Biesheuvel , Leif Lindholm , Laszlo Ersek , Eric Auger , Andrew Jones , Philippe Mathieu-Daude Date: Fri, 30 Nov 2018 12:28:28 +0100 Message-Id: <20181130112829.12173-4-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181130112829.12173-1-ard.biesheuvel@linaro.org> References: <20181130112829.12173-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Subject: [PATCH v2 3/4] ArmVirtPkg/NorFlashQemuLib: disregard our primary FV X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 30 Nov 2018 11:28:38 -0000 Content-Transfer-Encoding: 8bit The primary FV contains the firmware boot image, which is not runtime updatable in our case. So exposing it to the NOR flash driver is undesirable, since it may attempt to modify the NOR flash contents. It is also rather pointless, since we don't keep anything there that we care to expose. (the SEC and PEI phase modules are not executable from DXE context, and the contents of the embedded DXE phase FV are exposed by the DXE core directly via the FVB2 protocol) So let's disregard the NOR flash block that covers the primary FV. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- ArmVirtPkg/Library/NorFlashQemuLib/NorFlashQemuLib.inf | 5 +++++ ArmVirtPkg/Library/NorFlashQemuLib/NorFlashQemuLib.c | 13 +++++++++++-- 2 files changed, 16 insertions(+), 2 deletions(-) diff --git a/ArmVirtPkg/Library/NorFlashQemuLib/NorFlashQemuLib.inf b/ArmVirtPkg/Library/NorFlashQemuLib/NorFlashQemuLib.inf index d86ff36dbd58..c5752a243e6b 100644 --- a/ArmVirtPkg/Library/NorFlashQemuLib/NorFlashQemuLib.inf +++ b/ArmVirtPkg/Library/NorFlashQemuLib/NorFlashQemuLib.inf @@ -28,6 +28,7 @@ [Sources.common] [Packages] MdePkg/MdePkg.dec ArmPlatformPkg/ArmPlatformPkg.dec + ArmPkg/ArmPkg.dec ArmVirtPkg/ArmVirtPkg.dec [LibraryClasses] @@ -40,3 +41,7 @@ [Protocols] [Depex] gFdtClientProtocolGuid + +[Pcd] + gArmTokenSpaceGuid.PcdFvBaseAddress + gArmTokenSpaceGuid.PcdFvSize diff --git a/ArmVirtPkg/Library/NorFlashQemuLib/NorFlashQemuLib.c b/ArmVirtPkg/Library/NorFlashQemuLib/NorFlashQemuLib.c index 2678f57eaaad..d238e39a59f1 100644 --- a/ArmVirtPkg/Library/NorFlashQemuLib/NorFlashQemuLib.c +++ b/ArmVirtPkg/Library/NorFlashQemuLib/NorFlashQemuLib.c @@ -75,13 +75,22 @@ NorFlashPlatformGetDevices ( Size = SwapBytes64 (ReadUnaligned64 ((VOID *)&Reg[2])); Reg += 4; + PropSize -= 4 * sizeof (UINT32); + + // + // Disregard any flash devices that overlap with the primary FV. + // The firmware is not updatable from inside the guest anyway. + // + if ((PcdGet64 (PcdFvBaseAddress) + PcdGet32 (PcdFvSize) > Base) && + (Base + Size) > PcdGet64 (PcdFvBaseAddress)) { + continue; + } + mNorFlashDevices[Num].DeviceBaseAddress = (UINTN)Base; mNorFlashDevices[Num].RegionBaseAddress = (UINTN)Base; mNorFlashDevices[Num].Size = (UINTN)Size; mNorFlashDevices[Num].BlockSize = QEMU_NOR_BLOCK_SIZE; Num++; - - PropSize -= 4 * sizeof (UINT32); } } -- 2.19.1