From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::341; helo=mail-wm1-x341.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm1-x341.google.com (mail-wm1-x341.google.com [IPv6:2a00:1450:4864:20::341]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id A6E6E21198CC8 for ; Tue, 4 Dec 2018 08:37:31 -0800 (PST) Received: by mail-wm1-x341.google.com with SMTP id q26so9962402wmf.5 for ; Tue, 04 Dec 2018 08:37:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=loHuKrcD1TkTC3iGysUGOhdoXeU9ZC7mZsO7rNh3EUk=; b=fR/+vPDLODf/5SVMk6ToFEsRCwN8blgfKKOcdgb2P1OURom9GobZDsubgrjablw4cb PGbiXrerTDcU+YNbxa4eaKcrogmMRWbJL9/xrxYGxrg3OjTtqC9UhZxvbPY7NkKgB+cG ScpHXgQuPJsB98A7Rltnk4PwYIVaCVbxQB9Fo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=loHuKrcD1TkTC3iGysUGOhdoXeU9ZC7mZsO7rNh3EUk=; b=Bj4sp1tgQIloYc3rYgGLV2hy/Rqshw6ifB+EqvmOxcFzJ6Mrn5SEMikH5hLxjGwG4t MxZ9acLawqOIB+Fn5kCEijRlGbB0kAYee6f9yJCi74QSCdnfQPtwRIFKUsNi6g6dJruy wXRnZpuzrWsvJAbHBk6R3cvfgZ5VyToyTt9JZhicfCB2N7BdGIeLLG45MHnz2dNgzjUj slSwd2IT1stncP0eRmxB3CLmEWspyyZEXJL5pg+3U/XxA8ZFDZj390cQ6HS2HTU8GlNx rylMcEcpUFnbpg8EkU3TFTZQ/scqzuaSaazulsXxnDTZSoxyLrgz3t1riWPGJJDs1tYV lT6A== X-Gm-Message-State: AA+aEWbE8bBh6PGvVrSzLDCzhdF7C8UzSy+0huELmVoFzhyElc+NfvIs gFwl9/9D7BDXMYvMY/dXZjD50A== X-Google-Smtp-Source: AFSGD/XyYWb3Wuuk21WS5TG970wH8O9vy0vx/lnH64+ohSAgs+PO9A1b79EZA8G/L6SxuFir/jvreA== X-Received: by 2002:a1c:b70b:: with SMTP id h11mr13381959wmf.72.1543941449977; Tue, 04 Dec 2018 08:37:29 -0800 (PST) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id 6-v6sm10425418wmd.45.2018.12.04.08.37.28 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 04 Dec 2018 08:37:28 -0800 (PST) Date: Tue, 4 Dec 2018 16:37:26 +0000 From: Leif Lindholm To: Marcin Wojtas Cc: edk2-devel@lists.01.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, jsd@semihalf.com, jaz@semihalf.com, kostap@marvell.com, jinghua Message-ID: <20181204163726.4j5pm4cbwlmb5oea@bivouac.eciton.net> References: <1540000661-1956-1-git-send-email-mw@semihalf.com> <1540000661-1956-9-git-send-email-mw@semihalf.com> MIME-Version: 1.0 In-Reply-To: <1540000661-1956-9-git-send-email-mw@semihalf.com> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [platforms: PATCH 08/12] Marvell/Drivers: MvGpioDxe: Introduce platform GPIO driver X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 04 Dec 2018 16:37:32 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Sat, Oct 20, 2018 at 03:57:37AM +0200, Marcin Wojtas wrote: > From: jinghua > > Marvell Armada 7k/8k SoCs comprise integrated GPIO controllers, > one in AP and two in each possible CP hardware blocks. > > This patch introduces support for them, which is a producer of > MARVELL_GPIO_PROTOCOL, which add necessary routines. > Hardware description of the controllers is placed in MvHwDescLib.c, > same as other devices. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Marcin Wojtas > --- > Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.inf | 43 +++ > Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.h | 52 ++++ > Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.c | 298 ++++++++++++++++++++ > 3 files changed, 393 insertions(+) > create mode 100644 Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.inf > create mode 100644 Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.h > create mode 100644 Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.c > > diff --git a/Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.inf b/Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.inf > new file mode 100644 > index 0000000..2d56433 > --- /dev/null > +++ b/Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.inf > @@ -0,0 +1,43 @@ > +## @file > +# > +# Copyright (c) 2017, Marvell International Ltd. All rights reserved.
> +# > +# This program and the accompanying materials are licensed and made available > +# under the terms and conditions of the BSD License which accompanies this > +# distribution. The full text of the license may be found at > +# http://opensource.org/licenses/bsd-license.php > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR > +# IMPLIED. > +# > + > +[Defines] > + INF_VERSION = 0x0001001A > + BASE_NAME = MvGpioDxe > + FILE_GUID = 706eb761-b3b5-4f41-8558-5fd9217c0079 > + MODULE_TYPE = DXE_DRIVER > + VERSION_STRING = 1.0 > + ENTRY_POINT = MvGpioEntryPoint > + > +[Sources] > + MvGpioDxe.c > + MvGpioDxe.h > + > +[Packages] > + MdeModulePkg/MdeModulePkg.dec > + MdePkg/MdePkg.dec > + Silicon/Marvell/Marvell.dec > + > +[LibraryClasses] > + ArmadaSoCDescLib > + DebugLib > + MemoryAllocationLib > + UefiDriverEntryPoint > + UefiLib > + > +[Protocols] > + gMarvellBoardDescProtocolGuid > + gMarvellGpioProtocolGuid > + > +[Depex] > + TRUE > diff --git a/Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.h b/Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.h > new file mode 100644 > index 0000000..48744dc > --- /dev/null > +++ b/Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.h > @@ -0,0 +1,52 @@ > +/** > +* > +* Copyright (c) 2018, Marvell International Ltd. All rights reserved. > +* > +* This program and the accompanying materials are licensed and made available > +* under the terms and conditions of the BSD License which accompanies this > +* distribution. The full text of the license may be found at > +* http://opensource.org/licenses/bsd-license.php > +* > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +* > +**/ > +#ifndef __MV_GPIO_H__ > +#define __MV_GPIO_H__ > + > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include > +#include > + > +#include > + > +#define GPIO_SIGNATURE SIGNATURE_32 ('G', 'P', 'I', 'O') Needs more MV. > + > +#ifndef BIT > +#define BIT(nr) (1 << (nr)) > +#endif OK, you are using this with non-constants. But please drop the #ifndef and submit a patch to add a BIT macro to MdePkg/Include/Base.h. (And drop this if you get it accepted :) > + > +// Marvell GPIO Controller Registers > +#define GPIO_DATA_OUT_REG (0x0) > +#define GPIO_OUT_EN_REG (0x4) > +#define GPIO_BLINK_EN_REG (0x8) > +#define GPIO_DATA_IN_POL_REG (0xc) > +#define GPIO_DATA_IN_REG (0x10) Needs more MV. > + > +typedef struct { > + MARVELL_GPIO_PROTOCOL GpioProtocol; > + MV_BOARD_GPIO_DESC *Desc; > + UINTN Signature; > + EFI_HANDLE Handle; > +} MV_GPIO; > + > +#endif // __MV_GPIO_H__ > diff --git a/Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.c b/Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.c > new file mode 100644 > index 0000000..fc2d416 > --- /dev/null > +++ b/Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.c > @@ -0,0 +1,298 @@ > +/** > +* > +* Copyright (c) 2018, Marvell International Ltd. All rights reserved. > +* > +* This program and the accompanying materials are licensed and made available > +* under the terms and conditions of the BSD License which accompanies this > +* distribution. The full text of the license may be found at > +* http://opensource.org/licenses/bsd-license.php > +* > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +* > +**/ > + > +#include "MvGpioDxe.h" > + > +STATIC MV_GPIO *mGpioInstance; > + > +STATIC MV_GPIO_DEVICE_PATH mGpioDevicePathTemplate = { (Again, not used outside this file, doesn't really need the Gpio bit in the name. Up to you.) > + { > + { > + HARDWARE_DEVICE_PATH, > + HW_VENDOR_DP, > + { > + (UINT8) (sizeof (VENDOR_DEVICE_PATH) + > + sizeof (MARVELL_GPIO_DRIVER_TYPE)), > + (UINT8) ((sizeof (VENDOR_DEVICE_PATH) + > + sizeof (MARVELL_GPIO_DRIVER_TYPE)) >> 8), > + }, > + }, > + EFI_CALLER_ID_GUID > + }, > + GPIO_DRIVER_TYPE_SOC_CONTROLLER, > + { > + END_DEVICE_PATH_TYPE, > + END_ENTIRE_DEVICE_PATH_SUBTYPE, > + { > + sizeof(EFI_DEVICE_PATH_PROTOCOL), > + 0 > + } > + } > +}; > + > +STATIC > +EFI_STATUS > +MvGpioValidate ( > + IN UINTN ControllerIndex, > + IN UINTN GpioPin > + ) > +{ Please add a comment header for this function explaining what it does. (I will start becoming more strict on this in general, but I know I've been lax in the past, so I'll ease into it.) > + if (ControllerIndex >= mGpioInstance->Desc->GpioDevCount) { > + DEBUG ((DEBUG_ERROR, > + "%a: Invalid GPIO ControllerIndex: %d\n", > + __FUNCTION__, > + ControllerIndex)); > + return EFI_INVALID_PARAMETER; > + } > + > + if (GpioPin >= mGpioInstance->Desc->SoC[ControllerIndex].GpioPinCount) { > + DEBUG ((DEBUG_ERROR, > + "%a: GPIO pin #%d not available in Controller#%d\n", > + __FUNCTION__, > + GpioPin, > + ControllerIndex)); > + return EFI_INVALID_PARAMETER; > + } > + > + return EFI_SUCCESS; > +} > + > +STATIC > +EFI_STATUS > +MvGpioDirectionOutput ( > + IN MARVELL_GPIO_PROTOCOL *This, > + IN UINTN ControllerIndex, > + IN UINTN GpioPin, > + IN BOOLEAN Value > + ) > +{ > + UINTN BaseAddress; > + EFI_STATUS Status; > + > + Status = MvGpioValidate (ControllerIndex, GpioPin); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_ERROR, > + "%a: Fail to set output for pin #%d\n", > + __FUNCTION__, > + GpioPin)); > + return Status; > + } So, I'm on the fence here. Do we need to validate that we're not trying to write pins that don't exist all the time? I could see why it may be useful for DEBUG builds and new board bringup, but even then - could it be a helper function that is called from an ASSERT and only included ifndef MDEPKG_NDEBUG? > + > + BaseAddress = mGpioInstance->Desc->SoC[ControllerIndex].GpioBaseAddress; > + > + MmioAndThenOr32 (BaseAddress + GPIO_DATA_OUT_REG, > + ~BIT (GpioPin), > + (Value) << GpioPin); Would be cleaner to have a BITPOSITION macro to match the BIT one. > + > + MmioAnd32 (BaseAddress + GPIO_OUT_EN_REG, ~BIT (GpioPin)); > + > + return EFI_SUCCESS; > +} > + > +STATIC > +EFI_STATUS > +MvGpioDirectionInput ( > + IN MARVELL_GPIO_PROTOCOL *This, > + IN UINTN ControllerIndex, > + IN UINTN GpioPin > + ) > +{ > + UINTN BaseAddress; > + EFI_STATUS Status; > + > + Status = MvGpioValidate (ControllerIndex, GpioPin); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_ERROR, > + "%a: Fail to set input for pin #%d\n", > + __FUNCTION__, > + GpioPin)); > + return Status; > + } > + > + BaseAddress = mGpioInstance->Desc->SoC[ControllerIndex].GpioBaseAddress; > + > + MmioOr32 (BaseAddress + GPIO_OUT_EN_REG, BIT (GpioPin)); > + > + return EFI_SUCCESS; > +} > + > +STATIC > +EFI_STATUS > +MvGpioGetFunction ( > + IN MARVELL_GPIO_PROTOCOL *This, > + IN UINTN ControllerIndex, > + IN UINTN GpioPin, > + OUT MARVELL_GPIO_MODE *Mode > + ) > +{ > + UINT32 RegVal; > + UINTN BaseAddress; > + EFI_STATUS Status; > + > + Status = MvGpioValidate (ControllerIndex, GpioPin); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_ERROR, > + "%a: Fail to get function of pin #%d\n", > + __FUNCTION__, > + GpioPin)); > + return Status; > + } > + > + BaseAddress = mGpioInstance->Desc->SoC[ControllerIndex].GpioBaseAddress; > + > + RegVal = MmioRead32 (BaseAddress + GPIO_OUT_EN_REG); > + *Mode = ((RegVal & BIT (GpioPin)) ? GPIO_MODE_INPUT : GPIO_MODE_OUTPUT); Not a fan of this. This is abusing the fact that the programmer knows the numeric values of the enum members. At which point, why not nuke the ternary overhead and go *Mode = (RegVal & BIT (GpioPin)) >> BIT (GpioPin); ? An alternative interpretation is that the enum is the software view only, and that the bit meaning is hardware dependent. In that case, we additionally need a #define for that. > + > + return EFI_SUCCESS; > +} > + > +STATIC > +EFI_STATUS > +MvGpioGetValue ( > + IN MARVELL_GPIO_PROTOCOL *This, > + IN UINTN ControllerIndex, > + IN UINTN GpioPin, > + IN OUT BOOLEAN *Value > + ) > +{ > + UINTN BaseAddress; > + EFI_STATUS Status; > + > + Status = MvGpioValidate (ControllerIndex, GpioPin); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_ERROR, > + "%a: Fail to get value of pin #%d\n", > + __FUNCTION__, > + GpioPin)); > + return Status; > + } > + > + BaseAddress = mGpioInstance->Desc->SoC[ControllerIndex].GpioBaseAddress; > + > + *Value = !!(MmioRead32 (BaseAddress + GPIO_DATA_IN_REG) & BIT (GpioPin)); Please don't !!. If necessary, please shift. / Leif > + > + return EFI_SUCCESS; > +} > + > +STATIC > +EFI_STATUS > +MvGpioSetValue ( > + IN MARVELL_GPIO_PROTOCOL *This, > + IN UINTN ControllerIndex, > + IN UINTN GpioPin, > + IN BOOLEAN Value > + ) > +{ > + UINTN BaseAddress; > + EFI_STATUS Status; > + > + Status = MvGpioValidate (ControllerIndex, GpioPin); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_ERROR, > + "%a: Fail to get value of pin #%d\n", > + __FUNCTION__, > + GpioPin)); > + return Status; > + } > + > + BaseAddress = mGpioInstance->Desc->SoC[ControllerIndex].GpioBaseAddress; > + > + MmioAndThenOr32 (BaseAddress + GPIO_DATA_OUT_REG, > + ~BIT (GpioPin), > + Value << GpioPin); > + > + return EFI_SUCCESS; > +} > + > +STATIC > +VOID > +MvGpioInitProtocol ( > + IN MARVELL_GPIO_PROTOCOL *GpioProtocol > + ) > +{ > + GpioProtocol->DirectionInput = MvGpioDirectionInput; > + GpioProtocol->DirectionOutput = MvGpioDirectionOutput; > + GpioProtocol->GetFunction = MvGpioGetFunction; > + GpioProtocol->GetValue = MvGpioGetValue; > + GpioProtocol->SetValue = MvGpioSetValue; > +} > + > +EFI_STATUS > +EFIAPI > +MvGpioEntryPoint ( > + IN EFI_HANDLE ImageHandle, > + IN EFI_SYSTEM_TABLE *SystemTable > + ) > +{ > + MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol; > + MV_GPIO_DEVICE_PATH *GpioDevicePath; > + MV_BOARD_GPIO_DESC *Desc; > + EFI_STATUS Status; > + > + GpioDevicePath = AllocateCopyPool (sizeof (MV_GPIO_DEVICE_PATH), > + &mGpioDevicePathTemplate); > + if (GpioDevicePath == NULL) { > + return EFI_OUT_OF_RESOURCES; > + } > + > + mGpioInstance = AllocateZeroPool (sizeof (MV_GPIO)); > + if (mGpioInstance == NULL) { > + Status = EFI_OUT_OF_RESOURCES; > + goto ErrGpioInstanceAlloc; > + } > + > + /* Obtain list of available controllers */ > + Status = gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid, > + NULL, > + (VOID **)&BoardDescProtocol); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_ERROR, > + "%a: Cannot locate BoardDesc protocol\n", > + __FUNCTION__)); > + goto ErrLocateBoardDesc; > + } > + > + Status = BoardDescProtocol->BoardDescGpioGet (BoardDescProtocol, &Desc); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_ERROR, > + "%a: Cannot get GPIO board desc from BoardDesc protocol\n", > + __FUNCTION__)); > + goto ErrLocateBoardDesc; > + } > + > + mGpioInstance->Signature = GPIO_SIGNATURE; > + mGpioInstance->Desc = Desc; > + > + MvGpioInitProtocol (&mGpioInstance->GpioProtocol); > + > + Status = gBS->InstallMultipleProtocolInterfaces (&(mGpioInstance->Handle), > + &gMarvellGpioProtocolGuid, > + &(mGpioInstance->GpioProtocol), > + &gEfiDevicePathProtocolGuid, > + (EFI_DEVICE_PATH_PROTOCOL *)GpioDevicePath, > + NULL); > + if (EFI_ERROR (Status)) { > + goto ErrLocateBoardDesc; > + } > + > + return EFI_SUCCESS; > + > +ErrLocateBoardDesc: > + gBS->FreePool (mGpioInstance); > + > +ErrGpioInstanceAlloc: > + gBS->FreePool (GpioDevicePath); > + > + return Status; > +} > -- > 2.7.4 >