From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::442; helo=mail-wr1-x442.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr1-x442.google.com (mail-wr1-x442.google.com [IPv6:2a00:1450:4864:20::442]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 043962119623E for ; Tue, 4 Dec 2018 09:06:04 -0800 (PST) Received: by mail-wr1-x442.google.com with SMTP id b14so3175518wru.12 for ; Tue, 04 Dec 2018 09:06:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=V2ls4xXTon8ZqSqu2M0yY4sFXJvp1qAZZgjSVaH2lYY=; b=OGwQcIH2TuNxZB9HQjNQBIhGtLc3UwgDR9kc4vhXhs64kwCgfxRYl+cUf8kEUYKIkm yWaFGGQr13p1R/QvYEPsa+9t8i0BV+6357OR/5GZtKaQmGIT0QkswFT4xIDU95246304 NyWrXs3oNR5WaaPZ+SNk2D4la2Z4WXjWzny0I= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=V2ls4xXTon8ZqSqu2M0yY4sFXJvp1qAZZgjSVaH2lYY=; b=jktLOKIqgcYt/nVc3hyf4j0bEZ+rzHNhjeRf/jEln2TNL2rqWIkZqrwG5COVGPjZyz IZpaR3KVgKcOffFHi1iwW9qEABmDD603Y2+tp/4cRXKqKpFYM+WV2Q0k7nbaj+ToHHta VTMtJVR1SNZY6/28JaGkCNE8Nii9W/OFL6NT0QjLz0rTTS7r1QUtyrxk/Nj1+ZJejxY1 CLUwxZOP6uZIeBtSOuk03O/rkdDIdMff0VU3WNtynptgtIzJk/0UFeeTOZomcPYmMa2S pu5yHLoMzukGjRsuqoNT3qD4pZeIzGFdbDwIuAFmCVxVARlIQv7TgJ/piwbGE9Wwb2Ul YWCA== X-Gm-Message-State: AA+aEWY44DOnN/6Zd9CFOj7gPjWtyT5cJAvrmSYDrbuMa73cCG2WXBql h2UhzG4BiUo5GUyTK7AFxhguKA== X-Google-Smtp-Source: AFSGD/WUI0ja4MyzwpyYmCWhEw8grPKPSTmTTVAslXuIrNaOCpARs44U3gBvi48Wgvg7KaZnDTv29Q== X-Received: by 2002:a5d:4286:: with SMTP id k6mr18769156wrq.225.1543943163372; Tue, 04 Dec 2018 09:06:03 -0800 (PST) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id x81sm10175980wmg.17.2018.12.04.09.06.01 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 04 Dec 2018 09:06:01 -0800 (PST) Date: Tue, 4 Dec 2018 17:06:00 +0000 From: Leif Lindholm To: Marcin Wojtas Cc: edk2-devel@lists.01.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, jsd@semihalf.com, jaz@semihalf.com, kostap@marvell.com Message-ID: <20181204170559.2lkglsvnlp67zihh@bivouac.eciton.net> References: <1540000661-1956-1-git-send-email-mw@semihalf.com> <1540000661-1956-12-git-send-email-mw@semihalf.com> MIME-Version: 1.0 In-Reply-To: <1540000661-1956-12-git-send-email-mw@semihalf.com> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [platforms: PATCH 11/12] Marvell/Armada7k8k: Enable GPIO drivers compilation X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 04 Dec 2018 17:06:05 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Sat, Oct 20, 2018 at 03:57:40AM +0200, Marcin Wojtas wrote: > Enable building new GPIO drivers before adding VBUS > pins handling. Update relevant boards .dsc files with > IO expander information. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Marcin Wojtas Reviewed-by: Leif Lindholm > --- > Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 2 ++ > Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc | 4 ++-- > Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc | 2 ++ > Platform/Marvell/Armada80x0Db/Armada80x0Db.fdf.inc | 2 ++ > Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.fdf.inc | 2 ++ > 5 files changed, 10 insertions(+), 2 deletions(-) > > diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc > index d4c67a2..62a46a6 100644 > --- a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc > +++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc > @@ -456,6 +456,8 @@ > Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.inf > > # Platform drivers > + Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.inf > + Silicon/Marvell/Drivers/Gpio/MvPca95xxDxe/MvPca95xxDxe.inf > Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf > MdeModulePkg/Bus/I2c/I2cDxe/I2cDxe.inf > Silicon/Marvell/Drivers/I2c/MvEepromDxe/MvEepromDxe.inf > diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc > index a935f36..31815e4 100644 > --- a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc > +++ b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc > @@ -89,8 +89,8 @@ > gMarvellTokenSpaceGuid.PcdChip1MppSel6|{ 0xE, 0xE, 0xE, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 } > > # I2C > - gMarvellTokenSpaceGuid.PcdI2cSlaveAddresses|{ 0x50, 0x57, 0x60 } > - gMarvellTokenSpaceGuid.PcdI2cSlaveBuses|{ 0x0, 0x0, 0x0 } > + gMarvellTokenSpaceGuid.PcdI2cSlaveAddresses|{ 0x50, 0x57, 0x60, 0x21 } > + gMarvellTokenSpaceGuid.PcdI2cSlaveBuses|{ 0x0, 0x0, 0x0, 0x0 } > gMarvellTokenSpaceGuid.PcdI2cControllersEnabled|{ 0x1, 0x1 } > gMarvellTokenSpaceGuid.PcdEepromI2cAddresses|{ 0x50, 0x57 } > gMarvellTokenSpaceGuid.PcdEepromI2cBuses|{ 0x0, 0x0 } > diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc b/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc > index b7e7a65..7129606 100644 > --- a/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc > +++ b/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc > @@ -12,6 +12,8 @@ > > # Per-board additional content of the DXE phase firmware volume > > + INF Silicon/Marvell/Drivers/Gpio/MvPca95xxDxe/MvPca95xxDxe.inf > + > # DTB > INF RuleOverride = DTB Silicon/Marvell/Armada7k8k/DeviceTree/Armada70x0Db.inf > > diff --git a/Platform/Marvell/Armada80x0Db/Armada80x0Db.fdf.inc b/Platform/Marvell/Armada80x0Db/Armada80x0Db.fdf.inc > index 81a81d0..f2fcc55 100644 > --- a/Platform/Marvell/Armada80x0Db/Armada80x0Db.fdf.inc > +++ b/Platform/Marvell/Armada80x0Db/Armada80x0Db.fdf.inc > @@ -12,6 +12,8 @@ > > # Per-board additional content of the DXE phase firmware volume > > + INF Silicon/Marvell/Drivers/Gpio/MvPca95xxDxe/MvPca95xxDxe.inf > + > # DTB > INF RuleOverride = DTB Silicon/Marvell/Armada7k8k/DeviceTree/Armada80x0Db.inf > > diff --git a/Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.fdf.inc b/Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.fdf.inc > index 326da2e..254fcee 100644 > --- a/Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.fdf.inc > +++ b/Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.fdf.inc > @@ -12,6 +12,8 @@ > > # Per-board additional content of the DXE phase firmware volume > > + INF Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.inf > + > # DTB > INF RuleOverride = DTB Silicon/Marvell/Armada7k8k/DeviceTree/Armada80x0McBin.inf > > -- > 2.7.4 >