From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::443; helo=mail-wr1-x443.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr1-x443.google.com (mail-wr1-x443.google.com [IPv6:2a00:1450:4864:20::443]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id AE53921A00AE6 for ; Thu, 6 Dec 2018 13:37:31 -0800 (PST) Received: by mail-wr1-x443.google.com with SMTP id u3so1950207wrs.3 for ; Thu, 06 Dec 2018 13:37:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=JEmDpLqymdybkMHLQtznRSMbI1D95R16R021srgFiuw=; b=ga0O7QqnP6030Jq2DFNowkt16UW8cKxv7kEhxs3m1vVElASDGpmHNYV5T6ZSDNPlhw isPbuddOMRkDQEGVG5mFrLi368Zq1CtyEUfGztxqRlBB+46I5ninRmUeDnOTVvhWe0+T fkH8c9ejLPNaF5lTch8Ml54g86fAdQyXqQnxk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=JEmDpLqymdybkMHLQtznRSMbI1D95R16R021srgFiuw=; b=LgBIkDgmQTCN4NCAzZb64bFMJNPRgg6zdWkwnW2WkRHGN2gDXf26l6nSmCtZ4P6yKz lxqrsABMXAHPDj10txdzRsodAJqe1qP/ny/XlbFi3anPWNH+QqhAwj/rsr1/sVZTl2SD wZ6/K8gweR2NhJGAELDtQ90DkGYvf8HDNzL2vk6C63uaidZ3KgQunmfJ0lLnrpC2jusE bsgsk42tSPZnO50NGVAGdZc7KI9qEqSUmURFF0jxK8xksRzgYxHa+QyNb3bO8PEbbZd0 4J/l1HANfTQ3dP4Mo6dxINA5rZpGyvHiqwhktAPGqmOefJuJ4E4ZZx41TSZp+TU6VTSk YXUA== X-Gm-Message-State: AA+aEWabs9TcDx1BV7lp/hSso9CvgkI0VCO8V9hIO35Azh20epV9y7n8 wzQijYWo28Wcu6J9CajuOfe/K+Leby7YEA== X-Google-Smtp-Source: AFSGD/VcFZIY1wG88hNesN4MOqj+EPdixCgQC/faNxehkG6s2fIJ7oMMsrZX8JRXC3J06tUFQTQxgw== X-Received: by 2002:adf:9205:: with SMTP id 5mr26932773wrj.189.1544132249289; Thu, 06 Dec 2018 13:37:29 -0800 (PST) Received: from harold.home ([2a01:cb1d:112:6f00:2cd0:a19e:84ff:4800]) by smtp.gmail.com with ESMTPSA id k19sm2620269wre.5.2018.12.06.13.37.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 06 Dec 2018 13:37:28 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Cc: Ard Biesheuvel , Leif Lindholm , Liming Gao , Laszlo Ersek , Eric Auger , Andrew Jones , Philippe Mathieu-Daude Date: Thu, 6 Dec 2018 22:37:21 +0100 Message-Id: <20181206213722.7597-1-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.19.2 MIME-Version: 1.0 Subject: [PATCH] Revert "MdePkg/ProcessorBind.h AARCH64: limit MAX_ADDRESS to 48 bits" X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 06 Dec 2018 21:37:32 -0000 Content-Transfer-Encoding: 8bit This reverts commit 82379bf6603274e81604d5a6f6bb14bdde616286. On AArch64, we can only use 48 address bits while running in UEFI, while the GCD and UEFI memory maps may describe up to 52 bits of physical address space. For this reason, MAX_ADDRESS was reduced to 48 bits, to ensure that the firmware does not inadvertently attempt to allocate memory that we cannot access. However, MAX_ADDRESS is used in runtime drivers as well, and runtime drivers may deal with kernel virtual addresses, which have bits [63:48] set. In fact, the OS may be running with 64 KB pages and pass addresses into the runtime services that use up to 52 bits of address space, either with the top bits set or cleared, even if the physical address space does not extend beyond 48 bits. In summary, changing MAX_ADDRESS is a mistake, and needs to be reverted. Cc: Leif Lindholm Cc: Liming Gao Cc: Laszlo Ersek Cc: Eric Auger Cc: Andrew Jones Cc: Philippe Mathieu-Daude Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- MdePkg/Include/AArch64/ProcessorBind.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/MdePkg/Include/AArch64/ProcessorBind.h b/MdePkg/Include/AArch64/ProcessorBind.h index dad75df1c579..968c18f915ae 100644 --- a/MdePkg/Include/AArch64/ProcessorBind.h +++ b/MdePkg/Include/AArch64/ProcessorBind.h @@ -138,9 +138,9 @@ typedef INT64 INTN; #define MAX_2_BITS 0xC000000000000000ULL /// -/// Maximum legal AARCH64 address (48 bits for 4 KB page size) +/// Maximum legal AARCH64 address /// -#define MAX_ADDRESS 0xFFFFFFFFFFFFULL +#define MAX_ADDRESS 0xFFFFFFFFFFFFFFFFULL /// /// Maximum legal AArch64 INTN and UINTN values. -- 2.19.2