From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::341; helo=mail-wm1-x341.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm1-x341.google.com (mail-wm1-x341.google.com [IPv6:2a00:1450:4864:20::341]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id CBF67211982E0 for ; Tue, 11 Dec 2018 04:19:45 -0800 (PST) Received: by mail-wm1-x341.google.com with SMTP id m1so1352989wml.2 for ; Tue, 11 Dec 2018 04:19:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=BxYBiGAesSEjkpvLDP4RtohzjjH8MEt2iif+HLSFtBQ=; b=LVOzrzWDrHVtUOzCnWOZSwHgVV55q6a6DQ5EwLI11M2bOmvPwLy0qusad0+UBXhprh jXatb8zU7rWmOcOyybWuRplyx8IjqWarujupZ5Fv9ToQBCBS3zpOBzbCASvMXR/URkGj LnzwuXRC9LnTwr18L+dwOTJECjR/s15HsIRUQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=BxYBiGAesSEjkpvLDP4RtohzjjH8MEt2iif+HLSFtBQ=; b=twB453CnP+sGFohn5b+CwktdAeNQSrstDRXfmqkjI7k31xyV1MqivMpQyrJKziRKiF Qbh7Mim+BL/Q7KLo8eWanqFAFvbBL19yUcCx9rHagNlMeoE6DW0x4E9YlloRVx2IEJOu mOsJP23jcGzlREOA7/3y4Zr03NZy7vGt3FbmS9BIFWuaOmhbFcPuWxSaMWE0or8PeKrf HzidN1zsVPb1wKNO+yip7+GAeboinRsuYI8jI3aVy6zztR70thd8K/VjUS+MOZHC4HoY 6fu09QIpya4b3dwV2GREyqDgp/ntLuT3DOFVuXdVKpcbb371SyNGqB3KJ5KPrpH/27JQ tTsA== X-Gm-Message-State: AA+aEWa0JKwetqiivdAzgHQNjDqM7rccJzA+QrUCB5zA3nIXpGD1i2oH 9NjJWEOQB90dX1HRacQFiOEgYE71qitt4Q== X-Google-Smtp-Source: AFSGD/XyqgrNBbgOMj9ELBNXT2rHRPHVb3AEPTUUcBhaILbQ/7ugaPCM3J51mNXJ02vZoUx+FJjPjg== X-Received: by 2002:a1c:e287:: with SMTP id z129mr2044832wmg.71.1544530783937; Tue, 11 Dec 2018 04:19:43 -0800 (PST) Received: from harold.home ([2a01:cb1d:112:6f00:8c3:6b9d:cbc9:58c6]) by smtp.gmail.com with ESMTPSA id n9sm14183017wrx.80.2018.12.11.04.19.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 11 Dec 2018 04:19:43 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Cc: lersek@redhat.com, leif.lindholm@linaro.org, philmd@redhat.com, Ard Biesheuvel Date: Tue, 11 Dec 2018 13:19:35 +0100 Message-Id: <20181211121936.3599-2-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181211121936.3599-1-ard.biesheuvel@linaro.org> References: <20181211121936.3599-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Subject: [PATCH 1/2] ArmVirtPkg/ArmVirtQemuKernel ARM: make some PCD settings apply to ARM X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 11 Dec 2018 12:19:46 -0000 Content-Transfer-Encoding: 8bit Move some PCD settings outs of the [PcdsFixedAtBuild.AARCH64] block, so that they apply to 32-bit ARM as well. Without this change, the ARM build doesn't work. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- ArmVirtPkg/ArmVirtQemuKernel.dsc | 20 +++++++++----------- 1 file changed, 9 insertions(+), 11 deletions(-) diff --git a/ArmVirtPkg/ArmVirtQemuKernel.dsc b/ArmVirtPkg/ArmVirtQemuKernel.dsc index d8fbf14e8f4e..9928919bf5b0 100644 --- a/ArmVirtPkg/ArmVirtQemuKernel.dsc +++ b/ArmVirtPkg/ArmVirtQemuKernel.dsc @@ -130,6 +130,15 @@ [PcdsFixedAtBuild.common] gEfiNetworkPkgTokenSpaceGuid.PcdAllowHttpConnections|TRUE !endif + gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE + gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 } + + # + # The maximum physical I/O addressability of the processor, set with + # BuildCpuHob(). + # + gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|16 + [PcdsPatchableInModule.common] # # This will be overridden in the code @@ -146,17 +155,6 @@ [PcdsPatchableInModule.common] gArmTokenSpaceGuid.PcdFdBaseAddress|0x0 gArmTokenSpaceGuid.PcdFvBaseAddress|0x0 -[PcdsFixedAtBuild.AARCH64] - - gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE - gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 } - - # - # The maximum physical I/O addressability of the processor, set with - # BuildCpuHob(). - # - gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|16 - [PcdsDynamicDefault.common] gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|3 -- 2.19.2