From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::343; helo=mail-wm1-x343.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm1-x343.google.com (mail-wm1-x343.google.com [IPv6:2a00:1450:4864:20::343]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 9786921199256 for ; Tue, 11 Dec 2018 10:35:24 -0800 (PST) Received: by mail-wm1-x343.google.com with SMTP id n190so3309532wmd.0 for ; Tue, 11 Dec 2018 10:35:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PxHi0WIcBTj2JZSS8M7isXhRqDkaaygaHB7OMzvGxwA=; b=E6Xi+6WC5uC0v1aIM1RwPTW87+MIXmWKYMpd62gFDsKnuI/NAMkeCesaHzTdASUtdr k1CXK73W1vTREoALrWRAumkyqObrNVu+O99L2EwjZeJLJ7IQXWZLFsm++5soaXHI7Ugz Ur01SsKLjzbsJ8m/JAcEcmY5kXRcAHPdQMdLM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PxHi0WIcBTj2JZSS8M7isXhRqDkaaygaHB7OMzvGxwA=; b=f6UzLO1CY2tLEYUVQP5pw42wxfgqXC90KXuMWkB5TVAzBWne4r3nXgvDZB0SlUHEBn fR/BLu/Zlq+HCvqS0t+C7BRbuQGCYIwLJYwLRP6yj1MONscerRmco32StdDs2EerNcDf L7mPTqRkVO+1IrqFxUijz5bTPUEIqdi54wOA46BxoDiL0X9iQL8M2bR4SwWDQMF71OxY mJQ9PMwVc8FIywu+6+ETFcg8vFoglqpa3HDJ0AKTiByIMgrJ4kfIw4kEwKpeU3EzaVeA PoCDlH5MeK+Nw6U/vvdjXIwHOL/2R0urFxYKXRjelLrKI94l8woHvc4IV98pDkal8OM1 nB6Q== X-Gm-Message-State: AA+aEWaxH8ROwrh6M5UV0GOBaK5M16az69XeFTBuCGUKairfH/JXDl/y 3RCZgnOrqRVFsqq3zJgSdWtOKNBKW51hjw== X-Google-Smtp-Source: AFSGD/WXk6R7DnbF9fOYBWJY1qPP61+cd/7fHL66/uLAK4aB65s7nalRAfVIZmDfFvzUDAyHpptAeA== X-Received: by 2002:a1c:384:: with SMTP id 126mr3483616wmd.26.1544553322826; Tue, 11 Dec 2018 10:35:22 -0800 (PST) Received: from harold.home ([2a01:cb1d:112:6f00:8c3:6b9d:cbc9:58c6]) by smtp.gmail.com with ESMTPSA id h131sm1026688wmd.17.2018.12.11.10.35.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 11 Dec 2018 10:35:21 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, alan@softiron.co.uk, Ard Biesheuvel Date: Tue, 11 Dec 2018 19:35:04 +0100 Message-Id: <20181211183514.20948-2-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181211183514.20948-1-ard.biesheuvel@linaro.org> References: <20181211183514.20948-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Subject: [PATCH edk2-platforms 01/11] Silicon/AMD/Styx/Iort: drop conditionally included XGBE nodes X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 11 Dec 2018 18:35:25 -0000 Content-Transfer-Encoding: 8bit The I/O Remapping Table (IORT) does not require that each device of which it describes the I/O remapping actually exists in the namespace. So let's simplify the code by always including the XGBE nodes, and just let them be unused if the platform does not include XGBE controllers. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/Iort.aslc | 8 -------- 1 file changed, 8 deletions(-) diff --git a/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/Iort.aslc b/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/Iort.aslc index 7723a4ddade3..073b994bc505 100644 --- a/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/Iort.aslc +++ b/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/Iort.aslc @@ -60,12 +60,10 @@ typedef struct { STYX_SMMU_NODE PciSmmuNode; STYX_RC_NODE PciRcNode; -#if DO_XGBE STYX_SMMU_NODE Eth0SmmuNode; STYX_NC_NODE Eth0NamedNode; STYX_SMMU_NODE Eth1SmmuNode; STYX_NC_NODE Eth1NamedNode; -#endif STYX_SMMU_NODE Sata0SmmuNode; STYX_NC_NODE Sata0NamedNode; @@ -147,11 +145,7 @@ STATIC STYX_IO_REMAPPING_STRUCTURE AcpiIort = { AMD_ACPI_HEADER(EFI_ACPI_6_0_IO_REMAPPING_TABLE_SIGNATURE, STYX_IO_REMAPPING_STRUCTURE, EFI_ACPI_IO_REMAPPING_TABLE_REVISION), -#if DO_XGBE 10, // NumNodes -#else - 6, // NumNodes -#endif sizeof(EFI_ACPI_6_0_IO_REMAPPING_TABLE), // NodeOffset 0 // Reserved }, { @@ -180,7 +174,6 @@ STATIC STYX_IO_REMAPPING_STRUCTURE AcpiIort = { }, { __STYX_ID_MAPPING(0x0, 0xffff, 0x0, PciSmmuNode, 0x0), } -#if DO_XGBE }, { // Eth0SmmuNode __STYX_SMMU_NODE(STYX_ETH0_SMMU_BASE, @@ -265,7 +258,6 @@ STATIC STYX_IO_REMAPPING_STRUCTURE AcpiIort = { __STYX_ID_MAPPING_SINGLE(0x1E, Eth1SmmuNode), __STYX_ID_MAPPING_SINGLE(0x1F, Eth1SmmuNode), } -#endif }, { // Sata0SmmuNode __STYX_SMMU_NODE(STYX_SATA0_SMMU_BASE, -- 2.19.2