From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::444; helo=mail-wr1-x444.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr1-x444.google.com (mail-wr1-x444.google.com [IPv6:2a00:1450:4864:20::444]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id EB6D421199256 for ; Tue, 11 Dec 2018 10:35:27 -0800 (PST) Received: by mail-wr1-x444.google.com with SMTP id z5so15134133wrt.11 for ; Tue, 11 Dec 2018 10:35:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cEt0KjzVfw5EGPG4WML7zMdltpjto+Jk+NomA+x1UMo=; b=gdIdYSOtMzL5+zc5UlMIFfjSUImza2eoZNZNQ/B8nCIdjWUXYt+A/0P1t9FEkheI30 lk9qyEt+ZkbDfsas8qtIhflxWh+7MWZtFHBvTdxXm1mCoRQvJUytxTSBzal1r+iisiPI buD4O+DG54/zNW17HdvNYQVjOHJmOAKNJBfKI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cEt0KjzVfw5EGPG4WML7zMdltpjto+Jk+NomA+x1UMo=; b=PQwGzPg0zm6sHBFPqMGnlWrYdJ9XKCFa1TqzovCnljjFIwyU8YEzvaAe1KyNmtKk41 M0j51uVz4bCl6KHyFjpJt6ZToacprBiVUmSB1l7HtaqSAeSZNeMGf9OQAA5OGcPAJU0V iZJCbi0pJ+Thc9wuTM0eC75SsKaANsNEpVu8kXQgg6XstyFe/NwQMWMMAp6CvSr2b7Ma zuueTxIH/mcre7GdmAElrPU6ZilQI1g6wsEEj05AgXfsrvyqKHIljtqPSQEAH9fr4/u4 6hq5i4nxTINEF/JTlt9DcD32MGENFcn8gRC9Vc5icW8FVzKpXcjMe+01+bjpbwD/sTlF cdRw== X-Gm-Message-State: AA+aEWakAXxEmCAsCGzIGySHxe2oSUPI7cq1jIJ4+yjsACYQFpHOPK2Q Mh1J0WAtmrnXVpX3oBWTqQzkaWHBZ4twnA== X-Google-Smtp-Source: AFSGD/VgbyW2D+ASo+Y5VFAMT7CdM6mfz8qG0hbGt+HEVBoLNFTvd0mmhmbCgpUMvzkXgD+v9SrvnQ== X-Received: by 2002:adf:f091:: with SMTP id n17mr14457591wro.292.1544553326159; Tue, 11 Dec 2018 10:35:26 -0800 (PST) Received: from harold.home ([2a01:cb1d:112:6f00:8c3:6b9d:cbc9:58c6]) by smtp.gmail.com with ESMTPSA id h131sm1026688wmd.17.2018.12.11.10.35.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 11 Dec 2018 10:35:25 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, alan@softiron.co.uk, Ard Biesheuvel Date: Tue, 11 Dec 2018 19:35:06 +0100 Message-Id: <20181211183514.20948-4-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181211183514.20948-1-ard.biesheuvel@linaro.org> References: <20181211183514.20948-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Subject: [PATCH edk2-platforms 03/11] Silicon/AMD/Styx/AcpiPlatformDxe: replace XGBE CPP conditional with PCD X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 11 Dec 2018 18:35:28 -0000 Content-Transfer-Encoding: 8bit We already have a boolean PCD that tells us whether XGBE support should be enabled, so use it instead of C preprocessor conditionals. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf | 1 + Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c | 13 ++++--------- 2 files changed, 5 insertions(+), 9 deletions(-) diff --git a/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf b/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf index be885d6aea90..d27431343f4b 100644 --- a/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf +++ b/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf @@ -68,6 +68,7 @@ gAmdStyxTokenSpaceGuid.PcdSocCpuId [FixedPcd] + gAmdModulePkgTokenSpaceGuid.PcdXgbeEnable gAmdStyxTokenSpaceGuid.PcdCntControlBase gAmdStyxTokenSpaceGuid.PcdCntReadBase gAmdStyxTokenSpaceGuid.PcdCntCTLBase diff --git a/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c b/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c index 9c17c38a04bf..9c8c8b09d4a4 100644 --- a/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c +++ b/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c @@ -43,7 +43,6 @@ STATIC EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol; STATIC AMD_MP_CORE_INFO_PROTOCOL *mAmdMpCoreInfoProtocol; -#if DO_XGBE STATIC CONST UINT8 mDefaultMacPackageA[] = { 0x12, 0xe, 0x6, 0xa, 0x2, 0xa, 0xa1, 0xa, 0xa2, 0xa, 0xa3, 0xa, 0xa4, 0xa, 0xa5 @@ -91,8 +90,6 @@ PatchAmlPackage ( } } -#endif - STATIC VOID EnableAvailableCores ( @@ -135,10 +132,7 @@ InstallSystemDescriptionTables ( EFI_ACPI_6_0_IO_REMAPPING_TABLE *Iort; EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER *Madt; EFI_ACPI_5_1_GIC_STRUCTURE *GicC; - -#if DO_XGBE UINT8 MacPackage[sizeof(mDefaultMacPackageA)]; -#endif CpuId = PcdGet32 (PcdSocCpuId); @@ -158,7 +152,10 @@ InstallSystemDescriptionTables ( break; case SIGNATURE_64 ('S', 't', 'y', 'x', 'X', 'g', 'b', 'e'): -#if DO_XGBE + if (!FixedPcdGetBool (PcdXgbeEnable)) { + continue; + } + // // Patch the SSDT binary with the correct MAC addresses // @@ -173,8 +170,6 @@ InstallSystemDescriptionTables ( (UINT8 *)Table, TableSize); break; -#endif - continue; default: switch (Table->Signature) { -- 2.19.2