From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::344; helo=mail-wm1-x344.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm1-x344.google.com (mail-wm1-x344.google.com [IPv6:2a00:1450:4864:20::344]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 67DDE2119C89A for ; Wed, 12 Dec 2018 02:33:14 -0800 (PST) Received: by mail-wm1-x344.google.com with SMTP id q26so5320184wmf.5 for ; Wed, 12 Dec 2018 02:33:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=GN5eTXvJ1uOiTycjPIar8fPc83dvVb3CCEUsp4PozSU=; b=EgIIQvBn4sy4pqcDvL4xetnrMAq/B+DXVP2FQFxswil+SXGZjnxCQU87jCI726GmMT xMcP/vpzyMQBEs6NVQWKSNlok5brbcqWMUNLmarnGt3vSqH9G4by6faVThNzb8PX5YwD crUQrOD12fY85A0dWGUM7rnh3TFvCAJ43Qmck= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GN5eTXvJ1uOiTycjPIar8fPc83dvVb3CCEUsp4PozSU=; b=NGpt18MpVuuFQzFb37Ag+vaPtvRvjEdI35MK947NKMYEiiriqknziL1+jdwlJYYXFf AgBKgmjP0wHhjXDQaGEfVPbTyC1SHcv4MsI9yHULmg675IIc6tcVAR9/9Iz3Lfh8EKvF PKyNLGgvy7z5RcuBU7DgalayQ4naAh4+gJ1TuPZLg56YaYbwi9fYisMmtbs3nCeEiSBc LR3YX3zM3LHBf9A5FQOyAn2GoTi7SnSCTobN/9/2Ya3OCdzhx1CpVc5PYLNNatwPCs7/ lLV6FdO1MFvY+nc0HakTWEpyBcx7CoFBnpI0HWMJUQAcrRQqASetUJDYPZseVULTStFR wnEg== X-Gm-Message-State: AA+aEWZGjDhpTObvHFXXH31JPqXd9RLawNNjcSayX0iH2wNOSNtpLDtB K0XEG11l1T50XHst2txn7LJKc0PjXc1W1A== X-Google-Smtp-Source: AFSGD/WC55nI++Xhsc8pWWe+c41G2C/Qb9OKu6FsCLrSdW4DJCEcuYF/PjYW44tjSDz5nzbQvXHGRA== X-Received: by 2002:a1c:f207:: with SMTP id s7mr5652440wmc.87.1544610792598; Wed, 12 Dec 2018 02:33:12 -0800 (PST) Received: from harold.home ([2a01:cb1d:112:6f00:1db:abd7:f798:3277]) by smtp.gmail.com with ESMTPSA id r69sm3132789wmd.4.2018.12.12.02.33.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 12 Dec 2018 02:33:11 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Cc: Ard Biesheuvel , Michael D Kinney , Liming Gao , Bob Feng , Leif Lindholm , Laszlo Ersek Date: Wed, 12 Dec 2018 11:33:06 +0100 Message-Id: <20181212103308.8099-2-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181212103308.8099-1-ard.biesheuvel@linaro.org> References: <20181212103308.8099-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Subject: [PATCH 1/3] MdePkg/BaseMemoryLibOptDxe ARM: add missing function annotations X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 12 Dec 2018 10:33:14 -0000 Content-Transfer-Encoding: 8bit ARM uses the low order bit of a branch target address to decide in which execution mode (ARM or Thumb) a function needs to be called. In order for this to work across object files, ELF function symbols will have the low bit set if they were emitted in Thumb mode and cleared otherwise. This annotation is only emitted if the ELF symbols are annotated as function, since taking the address of some data symbol (e.g., a literal) should not produce a value with the low bit set, even if it appears in an object file containing Thumb code. This means that all functions coded in assembler must have this function annotation, or they may end up getting called in the wrong mode, crashing the program. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- MdePkg/Library/BaseMemoryLibOptDxe/Arm/CompareGuid.S | 1 + MdePkg/Library/BaseMemoryLibOptDxe/Arm/CompareMem.S | 1 + MdePkg/Library/BaseMemoryLibOptDxe/Arm/CopyMem.S | 1 + MdePkg/Library/BaseMemoryLibOptDxe/Arm/SetMem.S | 5 +++++ 4 files changed, 8 insertions(+) diff --git a/MdePkg/Library/BaseMemoryLibOptDxe/Arm/CompareGuid.S b/MdePkg/Library/BaseMemoryLibOptDxe/Arm/CompareGuid.S index 6d0089049d48..b74056fa1f5f 100644 --- a/MdePkg/Library/BaseMemoryLibOptDxe/Arm/CompareGuid.S +++ b/MdePkg/Library/BaseMemoryLibOptDxe/Arm/CompareGuid.S @@ -30,6 +30,7 @@ .thumb .syntax unified .align 5 + .type ASM_PFX(InternalMemCompareGuid), %function ASM_GLOBAL ASM_PFX(InternalMemCompareGuid) ASM_PFX(InternalMemCompareGuid): push {r4, lr} diff --git a/MdePkg/Library/BaseMemoryLibOptDxe/Arm/CompareMem.S b/MdePkg/Library/BaseMemoryLibOptDxe/Arm/CompareMem.S index 9483aab61a0c..25a9a0994524 100644 --- a/MdePkg/Library/BaseMemoryLibOptDxe/Arm/CompareMem.S +++ b/MdePkg/Library/BaseMemoryLibOptDxe/Arm/CompareMem.S @@ -46,6 +46,7 @@ .thumb .syntax unified .align 5 + .type ASM_PFX(InternalMemCompareMem), %function ASM_GLOBAL ASM_PFX(InternalMemCompareMem) ASM_PFX(InternalMemCompareMem): push {r4-r8, lr} diff --git a/MdePkg/Library/BaseMemoryLibOptDxe/Arm/CopyMem.S b/MdePkg/Library/BaseMemoryLibOptDxe/Arm/CopyMem.S index 195a0b23f770..e1543f3c2a43 100644 --- a/MdePkg/Library/BaseMemoryLibOptDxe/Arm/CopyMem.S +++ b/MdePkg/Library/BaseMemoryLibOptDxe/Arm/CopyMem.S @@ -42,6 +42,7 @@ InternalMemCopyMem ( IN UINTN Length ) **/ + .type ASM_PFX(InternalMemCopyMem), %function ASM_GLOBAL ASM_PFX(InternalMemCopyMem) ASM_PFX(InternalMemCopyMem): push {r4-r11, lr} diff --git a/MdePkg/Library/BaseMemoryLibOptDxe/Arm/SetMem.S b/MdePkg/Library/BaseMemoryLibOptDxe/Arm/SetMem.S index 2d8f4d5b8621..928c1a12d558 100644 --- a/MdePkg/Library/BaseMemoryLibOptDxe/Arm/SetMem.S +++ b/MdePkg/Library/BaseMemoryLibOptDxe/Arm/SetMem.S @@ -16,6 +16,7 @@ .thumb .syntax unified .align 5 + .type ASM_PFX(InternalMemSetMem16), %function ASM_GLOBAL ASM_PFX(InternalMemSetMem16) ASM_PFX(InternalMemSetMem16): uxth r2, r2 @@ -23,17 +24,20 @@ ASM_PFX(InternalMemSetMem16): orr r2, r2, r2, lsl #16 b 0f + .type ASM_PFX(InternalMemSetMem32), %function ASM_GLOBAL ASM_PFX(InternalMemSetMem32) ASM_PFX(InternalMemSetMem32): lsl r1, r1, #2 b 0f + .type ASM_PFX(InternalMemSetMem64), %function ASM_GLOBAL ASM_PFX(InternalMemSetMem64) ASM_PFX(InternalMemSetMem64): lsl r1, r1, #3 b 1f .align 5 + .type ASM_PFX(InternalMemSetMem), %function ASM_GLOBAL ASM_PFX(InternalMemSetMem) ASM_PFX(InternalMemSetMem): uxtb r2, r2 @@ -41,6 +45,7 @@ ASM_PFX(InternalMemSetMem): orr r2, r2, r2, lsl #16 b 0f + .type ASM_PFX(InternalMemZeroMem), %function ASM_GLOBAL ASM_PFX(InternalMemZeroMem) ASM_PFX(InternalMemZeroMem): movs r2, #0 -- 2.19.2