From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::343; helo=mail-wm1-x343.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm1-x343.google.com (mail-wm1-x343.google.com [IPv6:2a00:1450:4864:20::343]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 4561A21CAD9B2 for ; Thu, 13 Dec 2018 09:26:35 -0800 (PST) Received: by mail-wm1-x343.google.com with SMTP id g67so3219230wmd.2 for ; Thu, 13 Dec 2018 09:26:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=54aXtT/HHKc0yNIi+Rs9whdX4AYPig9EeVneee2uImo=; b=Q46sy4p1KyRXCxnvWQ2wdj5uNvWn+RfLMyq04ISNIn1LDzd3tFiLfdE4lldU7GXhIK 7JiH9q47x6GAh6HV87kAY7I2NTsc0K3ANZaWJW4wDMUXm0UEgAeyrbfGsXwIPJ84InBg kwsFSwTUntCs+iy9g9TXjUpWkZ5BvkDKw5NdE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=54aXtT/HHKc0yNIi+Rs9whdX4AYPig9EeVneee2uImo=; b=Fd5WZjLUW6tdn073TYBEjH+3JoY2tuWVmfImkzNuIS1rFJ5snL5Fmk8hKElTjVGRx/ 7dzEwlZfNLX/WgonTa+Cc4oAXnYU0Icc/jDZUgqjgu72iFr/Lcax2xos8Ik63QnRiXIn Cle3svaO6yLLHZABbZgcAM/2yRgiTqOZMh2Zqrom8Taj9TRHnubtk8JplDCp1e6gVeUD EzUM/PB9R6CEy7WEvyRB8rIL7KxjM0TBzHysefiTTap+N/0OCe7inVdiRpzywIcWedL0 H1jNbDhl7e3QhrrAeC5UWS285ahPvxTCbnMrRupl3y0+soM1+yaAjmJN3NBxjdlXvXUw D8Mg== X-Gm-Message-State: AA+aEWab3nsU0ost1hur32Hofly+QQyNuZOrHNr0/L8OhPUT9EJv7NgS sAoidYDi8xkdWojz+IBknnUMaA== X-Google-Smtp-Source: AFSGD/XEJPnzWIzeYRbUuxkzjohM8X3rLYTHaal48C6yH1iO5XrJoVsxDWf7MZ08NWZQzTDteCj19Q== X-Received: by 2002:a1c:f0e:: with SMTP id 14mr216271wmp.37.1544721994339; Thu, 13 Dec 2018 09:26:34 -0800 (PST) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id l20sm4874089wrb.93.2018.12.13.09.26.33 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 13 Dec 2018 09:26:33 -0800 (PST) Date: Thu, 13 Dec 2018 17:26:31 +0000 From: Leif Lindholm To: Chris Co Cc: "edk2-devel@lists.01.org" , Ard Biesheuvel , Michael D Kinney Message-ID: <20181213172631.dwhagg7i4lcrgi2y@bivouac.eciton.net> References: <20180921082542.35768-1-christopher.co@microsoft.com> <20180921082542.35768-16-christopher.co@microsoft.com> MIME-Version: 1.0 In-Reply-To: <20180921082542.35768-16-christopher.co@microsoft.com> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH edk2-platforms 15/27] Silicon/NXP: Add i.MX6 GPT Timer library X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 13 Dec 2018 17:26:36 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Fri, Sep 21, 2018 at 08:26:07AM +0000, Chris Co wrote: > This adds support for GPT Timer on NXP i.MX6 SoCs. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Christopher Co > Cc: Ard Biesheuvel > Cc: Leif Lindholm > Cc: Michael D Kinney > --- > Silicon/NXP/iMX6Pkg/Include/iMX6Timer.h | 24 ++ > Silicon/NXP/iMX6Pkg/Library/TimerLib/TimerLib.c | 246 ++++++++++++++++++++ > Silicon/NXP/iMX6Pkg/Library/TimerLib/TimerLib.inf | 45 ++++ > 3 files changed, 315 insertions(+) > > diff --git a/Silicon/NXP/iMX6Pkg/Include/iMX6Timer.h b/Silicon/NXP/iMX6Pkg/Include/iMX6Timer.h > new file mode 100644 > index 000000000000..fbac9d2a61c0 > --- /dev/null > +++ b/Silicon/NXP/iMX6Pkg/Include/iMX6Timer.h > @@ -0,0 +1,24 @@ > +/** @file > +* > +* Copyright (c) 2018 Microsoft Corporation. All rights reserved. > +* > +* This program and the accompanying materials > +* are licensed and made available under the terms and conditions of the BSD License > +* which accompanies this distribution. The full text of the license may be found at > +* http://opensource.org/licenses/bsd-license.php > +* > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +* > +**/ > + > +#ifndef _IMX6_TIMER_H_ > +#define _IMX6_TIMER_H_ > + > +RETURN_STATUS > +EFIAPI > +TimerConstructor ( > + VOID > + ); > + > +#endif /* _IMX6_TIMER_H_ */ > diff --git a/Silicon/NXP/iMX6Pkg/Library/TimerLib/TimerLib.c b/Silicon/NXP/iMX6Pkg/Library/TimerLib/TimerLib.c > new file mode 100644 > index 000000000000..fa55cee242ef > --- /dev/null > +++ b/Silicon/NXP/iMX6Pkg/Library/TimerLib/TimerLib.c > @@ -0,0 +1,246 @@ > +/** @file > +* > +* Copyright (c) 2018 Microsoft Corporation. All rights reserved. > +* > +* This program and the accompanying materials > +* are licensed and made available under the terms and conditions of the BSD License > +* which accompanies this distribution. The full text of the license may be found at > +* http://opensource.org/licenses/bsd-license.php > +* > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +* > +**/ > + > +#include > +#include > + > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include > +#include > +#include > + > +RETURN_STATUS > +EFIAPI > +TimerConstructor ( > + VOID > + ) > +{ > + PCSP_GPT_REGS pGpt; > + UINT32 FreqPreScale; > + > + pGpt = (PCSP_GPT_REGS)CSP_BASE_REG_PA_GPT; > + > + ASSERT (SOC_OSC_FREQUENCY_REF_HZ >= PcdGet32 (PcdArmArchTimerFreqInHz)); This line strikes me as slightly counterintuitive. Are you reusing the Arch Timer Pcd for a custom timer? If this is the case, we should still be able to share some of the code from the ArmPkg ArmArchTimerLib by breaking it out and sharing it (like we did with TimeBaseLib). > + > + // Calculate the scale factor since we are using the 24Mhz oscillator > + // as reference. > + FreqPreScale = SOC_OSC_FREQUENCY_REF_HZ / PcdGet32 (PcdArmArchTimerFreqInHz); > + ASSERT (FreqPreScale <= (1 << GPT_PR_PRESCALER_WID)); > + > + // Set the frequency scale > + MmioWrite32 ((UINTN)&pGpt->PR, FreqPreScale - 1); > + > +#if defined(CPU_IMX6DQ) || defined (CPU_IMX6DQP) > + // Set GPT configuration: > + // - GPT Enabled > + // - Use the 24Mhz oscillator source > + MmioWrite32 ((UINTN)&pGpt->CR, > + (GPT_CR_EN_ENABLE << GPT_CR_EN_LSH) | Can you do a global search and replace _LSH/_SHIFT? / Leif