Re: [PATCH edk2-platforms 29/41] Compilation : Add the fdf, dsc and dec files

[Leif Lindholm <leif.lindholm@linaro.org>]

On Wed, Nov 28, 2018 at 08:31:43PM +0530, Meenakshi Aggarwal wrote:
> The firmware device, description and declaration files for LS2088 board
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
> Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> ---
>  Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.dec |  29 ++++
>  Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.dsc |  96 +++++++++++++
>  Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.fdf | 200 +++++++++++++++++++++++++++

No 'Pkg' for dsc/fdf.

>  Silicon/NXP/LS2088A/LS2088A.dec              |  22 +++

Whereas this .dec should probably be a Pkg.

>  Silicon/NXP/LS2088A/LS2088A.dsc.inc          |  71 ++++++++++
>  Silicon/NXP/NxpQoriqLs.dec                   |  13 ++

And this one (although I didn't spot this when added).

>  6 files changed, 431 insertions(+)
>  create mode 100644 Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.dec
>  create mode 100755 Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.dsc
>  create mode 100644 Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.fdf
>  create mode 100644 Silicon/NXP/LS2088A/LS2088A.dec
>  create mode 100644 Silicon/NXP/LS2088A/LS2088A.dsc.inc
> 
> diff --git a/Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.dec b/Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.dec
> new file mode 100644
> index 0000000..93d2e5a
> --- /dev/null
> +++ b/Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.dec
> @@ -0,0 +1,29 @@
> +#  LS2088aRdbPkg.dec
> +#  LS2088a board package.
> +#
> +#  Copyright 2017 NXP
> +#
> +#  This program and the accompanying materials are licensed and made available under
> +#  the terms and conditions of the BSD License which accompanies this distribution.
> +#  The full text of the license may be found at
> +#  http://opensource.org/licenses/bsd-license.php
> +#
> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +
> +[Defines]
> +  PACKAGE_NAME                   = LS2088aRdbPkg
> +  PACKAGE_GUID                   = 474e0c59-5f77-4060-82dd-9025ee4f4939
> +
> +################################################################################
> +#
> +# Include Section - list of Include Paths that are provided by this package.
> +#                   Comments are used for Keywords and Module Types.
> +#
> +# Supported Module Types:
> +#  BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
> +#
> +################################################################################
> +[Includes.common]
> +  Include                        # Root include for the package

If needed, this file should have been added with the files added to
that directory.

> diff --git a/Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.dsc b/Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.dsc
> new file mode 100755
> index 0000000..465c59e
> --- /dev/null
> +++ b/Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.dsc
> @@ -0,0 +1,96 @@
> +#  LS2088aRdbPkg.dsc
> +#
> +#  LS2088ARDB Board package.
> +#
> +#  Copyright 2017 NXP
> +#
> +#  This program and the accompanying materials
> +#  are licensed and made available under the terms and conditions of the BSD License
> +#  which accompanies this distribution. The full text of the license may be found at
> +#  http://opensource.org/licenses/bsd-license.php
> +#
> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +
> +################################################################################
> +#
> +# Defines Section - statements that will be processed to create a Makefile.
> +#
> +################################################################################
> +[Defines]
> +  #
> +  # Defines for default states.  These can be changed on the command line.
> +  # -D FLAG=VALUE
> +  #
> +  PLATFORM_NAME                  = LS2088aRdbPkg

Drop the 'Pkg'.

> +  PLATFORM_GUID                  = be06d8bc-05eb-44d6-b39f-191e93617ebd
> +  OUTPUT_DIRECTORY               = Build/LS2088aRdbPkg
> +  FLASH_DEFINITION               = Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.fdf

Please use $(PLATFORM_NAME) instead of repeating the string in the two
lines above.

> +  DEFINE MC_HIGH_MEM             = TRUE
> +
> +!include Platform/NXP/NxpQoriqLs.dsc.inc
> +!include Silicon/NXP/LS2088A/LS2088A.dsc.inc
> +
> +[LibraryClasses.common]
> +  SocLib|Silicon/NXP/Library/SocLib/LS2088aSocLib.inf
> +  ArmPlatformLib|Platform/NXP/LS2088aRdbPkg/Library/PlatformLib/ArmPlatformLib.inf
> +  ResetSystemLib|ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf
> +  SerialPortLib|Silicon/NXP/Library/DUartPortLib/DUartPortLib.inf
> +  IoAccessLib|Silicon/NXP/Library/IoAccessLib/IoAccessLib.inf
> +  RealTimeClockLib|Silicon/Maxim/Library/Ds3232RtcLib/Ds3232RtcLib.inf
> +
> +[PcdsFixedAtBuild.common]
> +
> +!if $(MC_HIGH_MEM) == TRUE                                        # Management Complex loaded at the end of DDR2
> +  gNxpQoriqLsTokenSpaceGuid.PcdDram1BaseAddr|0x0080000000         # Actual base address (0x0080000000)
> +  gNxpQoriqLsTokenSpaceGuid.PcdDram1Size|0x0080000000             # 2 GB
> +  gNxpQoriqLsTokenSpaceGuid.PcdDpaa2McRamSize|0x80000000          # 2GB (PcdDpaa2McRamSize must be 512MB aligned)
> +  gNxpQoriqLsTokenSpaceGuid.PcdMcHighMemSupport|1
> +  gArmTokenSpaceGuid.PcdSystemMemoryBase|0x0080000000             # Actual base
> +  gArmTokenSpaceGuid.PcdSystemMemorySize|0x0080000000             # 2G
> +!else
> +  gNxpQoriqLsTokenSpaceGuid.PcdDram1BaseAddr|0x00A0000000         # Actual base address (0x0080000000) + 512MB
> +  gNxpQoriqLsTokenSpaceGuid.PcdDram1Size|0x0060000000             # 2GB - 512MB
> +  gNxpQoriqLsTokenSpaceGuid.PcdDpaa2McRamSize|0x20000000          # 512MB (Fixed)
> +  gNxpQoriqLsTokenSpaceGuid.PcdMcHighMemSupport|0
> +  gArmTokenSpaceGuid.PcdSystemMemoryBase|0x00A0000000             # Actual base + 512MB
> +  gArmTokenSpaceGuid.PcdSystemMemorySize|0x0060000000             # 2G - 512MB
> +!endif
> +  gNxpQoriqLsTokenSpaceGuid.PcdDramMemSize|0x380000000            # 14 GB
> +  gNxpQoriqLsTokenSpaceGuid.PcdDram2BaseAddr|0x8080000000
> +  gNxpQoriqLsTokenSpaceGuid.PcdDram2Size|0x8800000000             # 512 GB
> +  gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x02000000
> +
> +  #
> +  # Board Specific Pcds
> +  #
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x21c0600
> +  gNxpQoriqLsTokenSpaceGuid.PcdSerdes2Enabled|TRUE
> +  gNxpQoriqLsTokenSpaceGuid.PcdPlatformFreqDiv|0x2
> +  gNxpQoriqLsTokenSpaceGuid.PcdDdrClk|133333333
> +
> +  #
> +  # RTC Pcds
> +  #
> +  gDs3232RtcLibTokenSpaceGuid.PcdI2cSlaveAddress|0x68
> +  gDs3232RtcLibTokenSpaceGuid.PcdI2cBusFrequency|100000
> +  gDs3232RtcLibTokenSpaceGuid.PcdIsRtcDeviceMuxed|TRUE
> +  gDs3232RtcLibTokenSpaceGuid.PcdMuxDeviceAddress|0x75
> +  gDs3232RtcLibTokenSpaceGuid.PcdMuxControlRegOffset|0x09
> +  gDs3232RtcLibTokenSpaceGuid.PcdMuxRtcChannelValue|0x09
> +  gDs3232RtcLibTokenSpaceGuid.PcdMuxDefaultChannelValue|0x08
> +
> +################################################################################
> +#
> +# Components Section - list of all EDK II Modules needed by this Platform
> +#
> +################################################################################
> +[Components.common]
> +  #
> +  # Architectural Protocols
> +  #
> +  MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf
> +  ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
> +  Silicon/NXP/Drivers/I2cDxe/I2cDxe.inf
> +  Platform/NXP/LS2088aRdbPkg/Drivers/PlatformDxe/PlatformDxe.inf
> diff --git a/Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.fdf b/Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.fdf
> new file mode 100644
> index 0000000..b526be1
> --- /dev/null
> +++ b/Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.fdf
> @@ -0,0 +1,200 @@
> +#  LS2088aRdbPkg.fdf
> +#
> +#  FLASH layout file for LS2088a board.
> +#
> +#  Copyright (c) 2016, Freescale Ltd. All rights reserved.
> +#  Copyright 2017 NXP
> +#
> +#  This program and the accompanying materials
> +#  are licensed and made available under the terms and conditions of the BSD License
> +#  which accompanies this distribution. The full text of the license may be found at
> +#  http://opensource.org/licenses/bsd-license.php
> +#
> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +
> +################################################################################
> +#
> +# FD Section
> +# The [FD] Section is made up of the definition statements and a
> +# description of what goes into  the Flash Device Image.  Each FD section
> +# defines one flash "device" image.  A flash device image may be one of
> +# the following: Removable media bootable image (like a boot floppy
> +# image,) an Option ROM image (that would be "flashed" into an add-in
> +# card,) a System "Flash"  image (that would be burned into a system's
> +# flash) or an Update ("Capsule") image that will be used to update and
> +# existing system flash.
> +#
> +################################################################################
> +
> +[FD.LS2088aRdb_EFI]
> +BaseAddress   = 0x82000000|gArmTokenSpaceGuid.PcdFdBaseAddress  #The base address of the FLASH Device.
> +Size          = 0x00100000|gArmTokenSpaceGuid.PcdFdSize           #The size in bytes of the FLASH Device
> +ErasePolarity = 1
> +BlockSize     = 0x1
> +NumBlocks     = 0x00100000
> +
> +################################################################################
> +#
> +# Following are lists of FD Region layout which correspond to the locations of different
> +# images within the flash device.
> +#
> +# Regions must be defined in ascending order and may not overlap.
> +#
> +# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
> +# the pipe "|" character, followed by the size of the region, also in hex with the leading
> +# "0x" characters. Like:
> +# Offset|Size
> +# PcdOffsetCName|PcdSizeCName
> +# RegionType <FV, DATA, or FILE>
> +#
> +################################################################################
> +0x00000000|0x00100000
> +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
> +FV = FVMAIN_COMPACT
> +
> +!include Platform/NXP/FVRules.fdf.inc
> +################################################################################
> +#
> +# FV Section
> +#
> +# [FV] section is used to define what components or modules are placed within a flash
> +# device file.  This section also defines order the components and modules are positioned
> +# within the image.  The [FV] section consists of define statements, set statements and
> +# module statements.
> +#
> +################################################################################
> +
> +[FV.FvMain]
> +FvNameGuid         = 1037c42b-8452-4c41-aac7-41e6c31468da
> +BlockSize          = 0x1
> +NumBlocks          = 0         # This FV gets compressed so make it just big enough
> +FvAlignment        = 8         # FV alignment and FV attributes setting.
> +ERASE_POLARITY     = 1
> +MEMORY_MAPPED      = TRUE
> +STICKY_WRITE       = TRUE
> +LOCK_CAP           = TRUE
> +LOCK_STATUS        = TRUE
> +WRITE_DISABLED_CAP = TRUE
> +WRITE_ENABLED_CAP  = TRUE
> +WRITE_STATUS       = TRUE
> +WRITE_LOCK_CAP     = TRUE
> +WRITE_LOCK_STATUS  = TRUE
> +READ_DISABLED_CAP  = TRUE
> +READ_ENABLED_CAP   = TRUE
> +READ_STATUS        = TRUE
> +READ_LOCK_CAP      = TRUE
> +READ_LOCK_STATUS   = TRUE
> +
> +  INF MdeModulePkg/Core/Dxe/DxeMain.inf
> +  INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
> +
> +  #
> +  # PI DXE Drivers producing Architectural Protocols (EFI Services)
> +  #
> +  INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
> +
> +  INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
> +  INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
> +  INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
> +  INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
> +  INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
> +  INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
> +  INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
> +  INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
> +  INF MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf
> +  INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
> +
> +  INF Platform/NXP/LS2088aRdbPkg/Drivers/PlatformDxe/PlatformDxe.inf
> +
> +  INF Silicon/NXP/Drivers/I2cDxe/I2cDxe.inf
> +
> +  INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
> +
> +  #
> +  # Multiple Console IO support
> +  #
> +  INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
> +  INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
> +  INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
> +  INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
> +  INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
> +
> +  INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
> +  INF EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf
> +
> +  #
> +  # Network modules
> +  #

Adjust for deprectaed modules.

> +  INF  MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
> +  INF  MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
> +  INF  MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
> +  INF  MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
> +  INF  MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
> +  INF  MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
> +  INF  MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
> +  INF  MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
> +  INF  MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
> +  INF  MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
> +  INF  MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
> +!if $(NETWORK_IP6_ENABLE) == TRUE
> +  INF  NetworkPkg/Ip6Dxe/Ip6Dxe.inf
> +  INF  NetworkPkg/TcpDxe/TcpDxe.inf
> +  INF  NetworkPkg/Udp6Dxe/Udp6Dxe.inf
> +  INF  NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
> +  INF  NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
> +  INF  NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
> +!else
> +  INF  MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
> +!endif
> +
> +  #
> +  # FAT filesystem + GPT/MBR partitioning
> +  #
> +  INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
> +  INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
> +  INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
> +  INF FatPkg/FatPei/FatPei.inf
> +  INF FatPkg/EnhancedFatDxe/Fat.inf
> +
> +  #
> +  # UEFI application (Shell Embedded Boot Loader)
> +  #
> +  INF ShellPkg/Application/Shell/Shell.inf
> +
> +  #
> +  # Bds
> +  #
> +  INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
> +  INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
> +  INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
> +  INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
> +  INF MdeModulePkg/Application/UiApp/UiApp.inf
> +
> +[FV.FVMAIN_COMPACT]
> +FvAlignment        = 8
> +ERASE_POLARITY     = 1
> +MEMORY_MAPPED      = TRUE
> +STICKY_WRITE       = TRUE
> +LOCK_CAP           = TRUE
> +LOCK_STATUS        = TRUE
> +WRITE_DISABLED_CAP = TRUE
> +WRITE_ENABLED_CAP  = TRUE
> +WRITE_STATUS       = TRUE
> +WRITE_LOCK_CAP     = TRUE
> +WRITE_LOCK_STATUS  = TRUE
> +READ_DISABLED_CAP  = TRUE
> +READ_ENABLED_CAP   = TRUE
> +READ_STATUS        = TRUE
> +READ_LOCK_CAP      = TRUE
> +READ_LOCK_STATUS   = TRUE
> +
> +  INF ArmPlatformPkg/PrePi/PeiUniCore.inf
> +
> +  FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
> +    SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
> +      SECTION FV_IMAGE = FVMAIN
> +    }
> +  }
> +
> diff --git a/Silicon/NXP/LS2088A/LS2088A.dec b/Silicon/NXP/LS2088A/LS2088A.dec
> new file mode 100644
> index 0000000..8539c63
> --- /dev/null
> +++ b/Silicon/NXP/LS2088A/LS2088A.dec
> @@ -0,0 +1,22 @@
> +# LS2088A.dec
> +#
> +# Copyright 2017 NXP
> +#
> +# This program and the accompanying materials are licensed and made available under
> +# the terms and conditions of the BSD License which accompanies this distribution.
> +# The full text of the license may be found at
> +# http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +#
> +
> +[Defines]
> +  DEC_SPECIFICATION              = 0x00010005

1A

> +
> +[Guids.common]
> +  gNxpLs2088ATokenSpaceGuid      = {0xaf770da7, 0x264c, 0x4857, {0x9d, 0xed, 0x56, 0x5e, 0x2c, 0x08, 0x7e, 0x26}}
> +
> +[Includes]
> +  Include

But again, this file should have been added when files were added to
the Include directory.

/
    Leif

> diff --git a/Silicon/NXP/LS2088A/LS2088A.dsc.inc b/Silicon/NXP/LS2088A/LS2088A.dsc.inc
> new file mode 100644
> index 0000000..8f7dbb5
> --- /dev/null
> +++ b/Silicon/NXP/LS2088A/LS2088A.dsc.inc
> @@ -0,0 +1,71 @@
> +#  LS2088A.dsc
> +#  LS2088A Soc package.
> +#
> +#  Copyright 2017 NXP
> +#
> +#  This program and the accompanying materials
> +#  are licensed and made available under the terms and conditions of the BSD License
> +#  which accompanies this distribution. The full text of the license may be found at
> +#  http://opensource.org/licenses/bsd-license.php
> +#
> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +#
> +
> +################################################################################
> +#
> +# Pcd Section - list of all EDK II PCD Entries defined by this Platform
> +#
> +################################################################################
> +[PcdsDynamicDefault.common]
> +
> +  #
> +  # ARM General Interrupt Controller
> +  gArmTokenSpaceGuid.PcdGicDistributorBase|0x6000000
> +  gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x6100000
> +  gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x00
> +
> +[PcdsFixedAtBuild.common]
> +
> +  gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x0C000000
> +  gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz|266666666 #266MHz
> +
> +  #
> +  # ARM L2x0 PCDs
> +  gArmTokenSpaceGuid.PcdL2x0ControllerBase|0x10900000
> +
> +  #
> +  # CCSR Address Space and other attached Memories
> +  #
> +  gNxpQoriqLsTokenSpaceGuid.PcdCcsrBaseAddr|0x01000000
> +  gNxpQoriqLsTokenSpaceGuid.PcdCcsrSize|0x0F000000
> +  gNxpQoriqLsTokenSpaceGuid.PcdClkBaseAddr|0x1370000
> +  gNxpQoriqLsTokenSpaceGuid.PcdIfcRegion1BaseAddr|0x30000000
> +  gNxpQoriqLsTokenSpaceGuid.PcdIfcRegion1Size|0x10000000
> +  gNxpQoriqLsTokenSpaceGuid.PcdIfcRegion2BaseAddr|0x510000000
> +  gNxpQoriqLsTokenSpaceGuid.PcdIfcRegion2Size|0xF0000000
> +  gNxpQoriqLsTokenSpaceGuid.PcdIfcNandReservedSize|0x3EEA
> +  gNxpQoriqLsTokenSpaceGuid.PcdQspiRegionBaseAddr|0x20000000
> +  gNxpQoriqLsTokenSpaceGuid.PcdQspiRegionSize|0x10000000
> +  gNxpQoriqLsTokenSpaceGuid.PcdQspiRegion2BaseAddr|0x400000000
> +  gNxpQoriqLsTokenSpaceGuid.PcdQspiRegion2Size|0x10000000
> +  gNxpQoriqLsTokenSpaceGuid.PcdPciExp1BaseAddr|0x2000000000
> +  gNxpQoriqLsTokenSpaceGuid.PcdPciExp1BaseSize|0x800000000        # 32 GB
> +  gNxpQoriqLsTokenSpaceGuid.PcdPciExp2BaseAddr|0x2800000000
> +  gNxpQoriqLsTokenSpaceGuid.PcdPciExp2BaseSize|0x800000000        # 32 GB
> +  gNxpQoriqLsTokenSpaceGuid.PcdPciExp3BaseAddr|0x3000000000
> +  gNxpQoriqLsTokenSpaceGuid.PcdPciExp3BaseSize|0x800000000        # 32 GB
> +  gNxpQoriqLsTokenSpaceGuid.PcdPciExp4BaseAddr|0x3800000000
> +  gNxpQoriqLsTokenSpaceGuid.PcdPciExp4BaseSize|0x800000000        # 32 GB
> +  gNxpQoriqLsTokenSpaceGuid.PcdSystemMemoryExBase|0x8080000000    # Extended System Memory Base
> +  gNxpQoriqLsTokenSpaceGuid.PcdSystemMemoryExSize|0x0380000000    # 14GB Extended System Memory Size
> +  gNxpQoriqLsTokenSpaceGuid.PcdUsbBaseAddr|0x3100000
> +  gNxpQoriqLsTokenSpaceGuid.PcdUsbSize|0x10000
> +  gNxpQoriqLsTokenSpaceGuid.PcdGutsBaseAddr|0x1E00000
> +  gNxpQoriqLsTokenSpaceGuid.PcdSdxcBaseAddr|0x02140000
> +  gNxpQoriqLsTokenSpaceGuid.PcdI2c0BaseAddr|0x02000000
> +  gNxpQoriqLsTokenSpaceGuid.PcdI2cSize|0x10000
> +  gNxpQoriqLsTokenSpaceGuid.PcdNumI2cController|4
> +
> +##
> diff --git a/Silicon/NXP/NxpQoriqLs.dec b/Silicon/NXP/NxpQoriqLs.dec
> index 159ea65..da148b7 100644
> --- a/Silicon/NXP/NxpQoriqLs.dec
> +++ b/Silicon/NXP/NxpQoriqLs.dec
> @@ -91,6 +91,18 @@
>    gNxpQoriqLsTokenSpaceGuid.PcdFlashReservedRegionBase64|0x0|UINT64|0x00000196
>  
>    #
> +  # DPAA2 PCDs
> +  #
> +  gNxpQoriqLsTokenSpaceGuid.PcdDpaa2McRamSize|0x0|UINT64|0x000001E0
> +  gNxpQoriqLsTokenSpaceGuid.PcdDpaa2McPortalBaseAddr|0x0|UINT64|0x000001E1
> +  gNxpQoriqLsTokenSpaceGuid.PcdDpaa2McPortalSize|0x0|UINT64|0x000001E2
> +  gNxpQoriqLsTokenSpaceGuid.PcdDpaa2NiPortalsBaseAddr|0x0|UINT64|0x000001E3
> +  gNxpQoriqLsTokenSpaceGuid.PcdDpaa2NiPortalsSize|0x0|UINT64|0x000001E4
> +  gNxpQoriqLsTokenSpaceGuid.PcdDpaa2QBmanPortalsBaseAddr|0x0|UINT64|0x000001E5
> +  gNxpQoriqLsTokenSpaceGuid.PcdDpaa2QBmanPortalSize|0x0|UINT64|0x000001E6
> +  gNxpQoriqLsTokenSpaceGuid.PcdDpaa2QBmanPortalsCacheSize|0x0|UINT64|0x000001E7
> +
> +  #
>    # NV Pcd
>    #
>    gNxpQoriqLsTokenSpaceGuid.PcdNvFdBase|0x0|UINT64|0x00000210
> @@ -102,6 +114,7 @@
>    gNxpQoriqLsTokenSpaceGuid.PcdPlatformFreqDiv|0x0|UINT32|0x00000250
>    gNxpQoriqLsTokenSpaceGuid.PcdSerdes2Enabled|FALSE|BOOLEAN|0x00000251
>    gNxpQoriqLsTokenSpaceGuid.PcdMuxToUsb3|FALSE|BOOLEAN|0x00000252
> +  gNxpQoriqLsTokenSpaceGuid.PcdMcHighMemSupport|FALSE|BOOLEAN|0x00000253
>  
>    #
>    # Clock PCDs
> -- 
> 1.9.1
>