From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::441; helo=mail-wr1-x441.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr1-x441.google.com (mail-wr1-x441.google.com [IPv6:2a00:1450:4864:20::441]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 8FB3B2119A84A for ; Fri, 21 Dec 2018 11:18:01 -0800 (PST) Received: by mail-wr1-x441.google.com with SMTP id t27so6349945wra.6 for ; Fri, 21 Dec 2018 11:18:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=NX0IAlXIP4L2Io0hTtyEAq4GNcP0SySV2aNo4Dfp9e4=; b=W8auJNdRMi8ljUuOm5f3XQ1D1YjIJqUG4L5NEJS08nZOca/uByBCEJw8kCX0uHJLMU hw1/NXRGTmzHW9YlUo822j6NPahTDGTZpOTx/1IeXQp13cfVcFeMqaE0wf8Ku/u0i0HS RSx4UVM6OcLS4afaPHotd+dbu7txECap7hhbA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=NX0IAlXIP4L2Io0hTtyEAq4GNcP0SySV2aNo4Dfp9e4=; b=JK/KgkrRQrpgmOsFYpv9LION+nz9LEdMOshMsVB6qOHza1F5YVpJ0ZaNvU0AonjcxR XrMkwySvQQPVie2NaME6ELaLZmL9R1SXt9gUmvIiKz/Zc7FyxCnYiIKNo0lYoVsLTIup 4Paz5rJsNE9aQnUi0UVBzFTNssXITxEa5xFpeZOaFtzSpih6V1PU8Rle1rIaV8KOv374 A9Ti3VVUa5qbftDyvNhy0mJnbvzMt/LwRNSAOJqDzVsp6YCiU/6ZqSWonctNdnJihs+H 0gtV4XH8eQnEqpzIJwwkYmrrsHn6CoXbL0MLC1LKerowE3dV7A8Ft3e315ozlTIoCS7L f/JA== X-Gm-Message-State: AJcUukeNYzhy30gAU02wWIQdD1cDhjiqQUOwHES/xG1fOJF4MAk/1Iob KzMlurPM/+EhzQ8jfso1Ypf78A== X-Google-Smtp-Source: ALg8bN4Q16IHK8Idkz3xdhQGmxBvAyblYywANlJiFb4zpg3A5YhAA5rDFXEbKgpyN86Ua6HrcuJR6A== X-Received: by 2002:adf:be8b:: with SMTP id i11mr3973553wrh.235.1545419879596; Fri, 21 Dec 2018 11:17:59 -0800 (PST) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id m21sm8662870wmi.43.2018.12.21.11.17.58 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 21 Dec 2018 11:17:58 -0800 (PST) Date: Fri, 21 Dec 2018 19:17:57 +0000 From: Leif Lindholm To: Meenakshi Aggarwal Cc: ard.biesheuvel@linaro.org, michael.d.kinney@intel.com, edk2-devel@lists.01.org, udit.kumar@nxp.com, v.sethi@nxp.com Message-ID: <20181221191757.7ltris5cebwhmzpp@bivouac.eciton.net> References: <1518771035-6733-1-git-send-email-meenakshi.aggarwal@nxp.com> <1543417315-5763-1-git-send-email-meenakshi.aggarwal@nxp.com> <1543417315-5763-2-git-send-email-meenakshi.aggarwal@nxp.com> MIME-Version: 1.0 In-Reply-To: <1543417315-5763-2-git-send-email-meenakshi.aggarwal@nxp.com> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH edk2-platforms 01/41] Silicon/NXP: Add Library to return Mmio APIs pointer X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 21 Dec 2018 19:18:02 -0000 X-List-Received-Date: Fri, 21 Dec 2018 19:18:02 -0000 X-List-Received-Date: Fri, 21 Dec 2018 19:18:02 -0000 X-List-Received-Date: Fri, 21 Dec 2018 19:18:02 -0000 X-List-Received-Date: Fri, 21 Dec 2018 19:18:02 -0000 X-List-Received-Date: Fri, 21 Dec 2018 19:18:02 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, Nov 28, 2018 at 08:31:15PM +0530, Meenakshi Aggarwal wrote: > This library add supports to return pointer to > MMIO APIs on basis of Swap flag. > If Flag is True then MMION APIs returened in which data > swapped after reading from MMIO and before write using MMIO. I conspicuously left this one for last. First thing I would like to see is splitting the setting up of function pointers bit from the actual I/O accesses (separate patches). The I/O functions belong in edk2 MdeModulePkg (or possibly EmbeddedPkg, of for some reason they don't want it in MdePkg). But regardless, please send that as a separate patch, preceding the edk2-platforms set. > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Meenakshi Aggarwal > --- > Silicon/NXP/Include/Library/IoAccessLib.h | 332 +++++++++++++++++++ > Silicon/NXP/Library/IoAccessLib/IoAccessLib.c | 410 ++++++++++++++++++++++++ > Silicon/NXP/Library/IoAccessLib/IoAccessLib.inf | 32 ++ > 3 files changed, 774 insertions(+) > create mode 100644 Silicon/NXP/Include/Library/IoAccessLib.h > create mode 100644 Silicon/NXP/Library/IoAccessLib/IoAccessLib.c > create mode 100644 Silicon/NXP/Library/IoAccessLib/IoAccessLib.inf > > diff --git a/Silicon/NXP/Include/Library/IoAccessLib.h b/Silicon/NXP/Include/Library/IoAccessLib.h > new file mode 100644 > index 0000000..f7372a5 > --- /dev/null > +++ b/Silicon/NXP/Include/Library/IoAccessLib.h > @@ -0,0 +1,332 @@ > +/** @file > + * > + * Copyright 2017 NXP > + * > + * This program and the accompanying materials > + * are licensed and made available under the terms and conditions of the BSD License > + * which accompanies this distribution. The full text of the license may be found at > + * http://opensource.org/licenses/bsd-license.php > + * > + * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > + * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > + * > + **/ > + > +#ifndef __IO_ACCESS_LIB_H__ > +#define __IO_ACCESS_LIB_H__ > + > +#include > + > +/// > +/// Structure to have pointer to R/W > +/// Mmio operations for 16 bits. > +/// > +typedef struct _MMIO_OPERATIONS_16 { > + UINT16 (*Read) (UINTN Address); > + UINT16 (*Write) (UINTN Address, UINT16 Value); > + UINT16 (*Or) (UINTN Address, UINT16 Or); > + UINT16 (*And) (UINTN Address, UINT16 AND); > + UINT16 (*AndThenOr) (UINTN Address, UINT16 And, UINT16 Or); > +} MMIO_OPERATIONS_16; I have sort of hinted at this in earlier comments on this set: Why separate structs for different access sizes? I don't expect there will be a noticeable image size or performance difference if they are all put into one structure. And if there is. we can conditionalise the inclusion of different widths with FixedPcds. So I would like for just a single GetMmioOperations() function that returns a single struct. And I would like for the member functions to have the access size as the suffix to their names, just like the regular IoLib functions. > + > +/// > +/// Structure to have pointer to R/W > +/// Mmio operations for 32 bits. > +/// > +typedef struct _MMIO_OPERATIONS_32 { > + UINT32 (*Read) (UINTN Address); > + UINT32 (*Write) (UINTN Address, UINT32 Value); > + UINT32 (*Or) (UINTN Address, UINT32 Or); > + UINT32 (*And) (UINTN Address, UINT32 AND); > + UINT32 (*AndThenOr) (UINTN Address, UINT32 And, UINT32 Or); > +} MMIO_OPERATIONS_32; > + > +/// > +/// Structure to have pointer to R/W > +/// Mmio operations for 64 bits. > +/// > +typedef struct _MMIO_OPERATIONS_64 { > + UINT64 (*Read) (UINTN Address); > + UINT64 (*Write) (UINTN Address, UINT64 Value); > + UINT64 (*Or) (UINTN Address, UINT64 Or); > + UINT64 (*And) (UINTN Address, UINT64 AND); > + UINT64 (*AndThenOr) (UINTN Address, UINT64 And, UINT64 Or); > +} MMIO_OPERATIONS_64; > + > +/** > + Function to return pointer to 16 bit Mmio operations. > + > + @param Swap Flag to tell if Swap is needed or not > + on Mmio Operations. > + > + @return Pointer to Mmio Operations. > + > +**/ > +MMIO_OPERATIONS_16 * > +GetMmioOperations16 ( > + IN BOOLEAN Swap > + ); > + > +/** > + Function to return pointer to 32 bit Mmio operations. > + > + @param Swap Flag to tell if Swap is needed or not > + on Mmio Operations. > + > + @return Pointer to Mmio Operations. > + > +**/ > +MMIO_OPERATIONS_32 * > +GetMmioOperations32 ( > + IN BOOLEAN Swap > + ); > + > +/** > + Function to return pointer to 64 bit Mmio operations. > + > + @param Swap Flag to tell if Swap is needed or not > + on Mmio Operations. > + > + @return Pointer to Mmio Operations. > + > +**/ > +MMIO_OPERATIONS_64 * > +GetMmioOperations64 ( > + IN BOOLEAN Swap > + ); > + > +/** > + MmioRead16 for Big-Endian modules. There is nothing inherently Big-Endian about this. It is byte-swapping. This concludes my review of this set, and I will now disappear on holiday until 7 January. Best Regards, Leif > + > + @param Address The MMIO register to read. > + > + @return The value read. > + > +**/ > +UINT16 > +EFIAPI > +SwapMmioRead16 ( > + IN UINTN Address > + ); > + > +/** > + MmioRead32 for Big-Endian modules. > + > + @param Address The MMIO register to read. > + > + @return The value read. > + > +**/ > +UINT32 > +EFIAPI > +SwapMmioRead32 ( > + IN UINTN Address > + ); > + > +/** > + MmioRead64 for Big-Endian modules. > + > + @param Address The MMIO register to read. > + > + @return The value read. > + > +**/ > +UINT64 > +EFIAPI > +SwapMmioRead64 ( > + IN UINTN Address > + ); > + > +/** > + MmioWrite16 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param Value The value to write to the MMIO register. > + > +**/ > +UINT16 > +EFIAPI > +SwapMmioWrite16 ( > + IN UINTN Address, > + IN UINT16 Value > + ); > + > +/** > + MmioWrite32 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param Value The value to write to the MMIO register. > + > +**/ > +UINT32 > +EFIAPI > +SwapMmioWrite32 ( > + IN UINTN Address, > + IN UINT32 Value > + ); > + > +/** > + MmioWrite64 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param Value The value to write to the MMIO register. > + > +**/ > +UINT64 > +EFIAPI > +SwapMmioWrite64 ( > + IN UINTN Address, > + IN UINT64 Value > + ); > + > +/** > + MmioAndThenOr16 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param AndData The value to AND with the read value from the MMIO register. > + @param OrData The value to OR with the result of the AND operation. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT16 > +EFIAPI > +SwapMmioAndThenOr16 ( > + IN UINTN Address, > + IN UINT16 AndData, > + IN UINT16 OrData > + ); > + > +/** > + MmioAndThenOr32 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param AndData The value to AND with the read value from the MMIO register. > + @param OrData The value to OR with the result of the AND operation. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT32 > +EFIAPI > +SwapMmioAndThenOr32 ( > + IN UINTN Address, > + IN UINT32 AndData, > + IN UINT32 OrData > + ); > + > +/** > + MmioAndThenOr64 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param AndData The value to AND with the read value from the MMIO register. > + @param OrData The value to OR with the result of the AND operation. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT64 > +EFIAPI > +SwapMmioAndThenOr64 ( > + IN UINTN Address, > + IN UINT64 AndData, > + IN UINT64 OrData > + ); > + > +/** > + MmioOr16 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param OrData The value to OR with the read value from the MMIO register. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT16 > +EFIAPI > +SwapMmioOr16 ( > + IN UINTN Address, > + IN UINT16 OrData > + ); > + > +/** > + MmioOr32 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param OrData The value to OR with the read value from the MMIO register. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT32 > +EFIAPI > +SwapMmioOr32 ( > + IN UINTN Address, > + IN UINT32 OrData > + ); > + > +/** > + MmioOr64 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param OrData The value to OR with the read value from the MMIO register. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT64 > +EFIAPI > +SwapMmioOr64 ( > + IN UINTN Address, > + IN UINT64 OrData > + ); > + > +/** > + MmioAnd16 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param AndData The value to AND with the read value from the MMIO register. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT16 > +EFIAPI > +SwapMmioAnd16 ( > + IN UINTN Address, > + IN UINT16 AndData > + ); > + > +/** > + MmioAnd32 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param AndData The value to AND with the read value from the MMIO register. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT32 > +EFIAPI > +SwapMmioAnd32 ( > + IN UINTN Address, > + IN UINT32 AndData > + ); > + > +/** > + MmioAnd64 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param AndData The value to AND with the read value from the MMIO register. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT64 > +EFIAPI > +SwapMmioAnd64 ( > + IN UINTN Address, > + IN UINT64 AndData > + ); > + > +#endif /* __IO_ACCESS_LIB_H__ */ > diff --git a/Silicon/NXP/Library/IoAccessLib/IoAccessLib.c b/Silicon/NXP/Library/IoAccessLib/IoAccessLib.c > new file mode 100644 > index 0000000..0260777 > --- /dev/null > +++ b/Silicon/NXP/Library/IoAccessLib/IoAccessLib.c > @@ -0,0 +1,410 @@ > +/** IoAccessLib.c > + > + Provide MMIO APIs for BE modules. > + > + Copyright 2017 NXP > + > + This program and the accompanying materials > + are licensed and made available under the terms and conditions of the BSD License > + which accompanies this distribution. The full text of the license may be found at > + http://opensource.org/licenses/bsd-license.php > + > + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > + > +**/ > + > +#include > +#include > +#include > +#include > + > +/** > + MmioRead16 for Big-Endian modules. > + > + @param Address The MMIO register to read. > + > + @return The value read. > + > +**/ > +UINT16 > +EFIAPI > +SwapMmioRead16 ( > + IN UINTN Address > + ) > +{ > + return SwapBytes16 (MmioRead16 (Address)); > +} > + > +/** > + MmioRead32 for Big-Endian modules. > + > + @param Address The MMIO register to read. > + > + @return The value read. > + > +**/ > +UINT32 > +EFIAPI > +SwapMmioRead32 ( > + IN UINTN Address > + ) > +{ > + return SwapBytes32 (MmioRead32 (Address)); > +} > + > +/** > + MmioRead64 for Big-Endian modules. > + > + @param Address The MMIO register to read. > + > + @return The value read. > + > +**/ > +UINT64 > +EFIAPI > +SwapMmioRead64 ( > + IN UINTN Address > + ) > +{ > + return SwapBytes64 (MmioRead64 (Address)); > +} > + > +/** > + MmioWrite16 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param Value The value to write to the MMIO register. > + > +**/ > +UINT16 > +EFIAPI > +SwapMmioWrite16 ( > + IN UINTN Address, > + IN UINT16 Value > + ) > +{ > + return MmioWrite16 (Address, SwapBytes16 (Value)); > +} > + > +/** > + MmioWrite32 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param Value The value to write to the MMIO register. > + > +**/ > +UINT32 > +EFIAPI > +SwapMmioWrite32 ( > + IN UINTN Address, > + IN UINT32 Value > + ) > +{ > + return MmioWrite32 (Address, SwapBytes32 (Value)); > +} > + > +/** > + MmioWrite64 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param Value The value to write to the MMIO register. > + > +**/ > +UINT64 > +EFIAPI > +SwapMmioWrite64 ( > + IN UINTN Address, > + IN UINT64 Value > + ) > +{ > + return MmioWrite64 (Address, SwapBytes64 (Value)); > +} > + > +/** > + MmioAndThenOr16 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param AndData The value to AND with the read value from the MMIO register. > + @param OrData The value to OR with the result of the AND operation. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT16 > +EFIAPI > +SwapMmioAndThenOr16 ( > + IN UINTN Address, > + IN UINT16 AndData, > + IN UINT16 OrData > + ) > +{ > + AndData = SwapBytes16 (AndData); > + OrData = SwapBytes16 (OrData); > + > + return MmioAndThenOr16 (Address, AndData, OrData); > +} > + > +/** > + MmioAndThenOr32 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param AndData The value to AND with the read value from the MMIO register. > + @param OrData The value to OR with the result of the AND operation. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT32 > +EFIAPI > +SwapMmioAndThenOr32 ( > + IN UINTN Address, > + IN UINT32 AndData, > + IN UINT32 OrData > + ) > +{ > + AndData = SwapBytes32 (AndData); > + OrData = SwapBytes32 (OrData); > + > + return MmioAndThenOr32 (Address, AndData, OrData); > +} > + > +/** > + MmioAndThenOr64 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param AndData The value to AND with the read value from the MMIO register. > + @param OrData The value to OR with the result of the AND operation. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT64 > +EFIAPI > +SwapMmioAndThenOr64 ( > + IN UINTN Address, > + IN UINT64 AndData, > + IN UINT64 OrData > + ) > +{ > + AndData = SwapBytes64 (AndData); > + OrData = SwapBytes64 (OrData); > + > + return MmioAndThenOr64 (Address, AndData, OrData); > +} > + > +/** > + MmioOr16 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param OrData The value to OR with the read value from the MMIO register. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT16 > +EFIAPI > +SwapMmioOr16 ( > + IN UINTN Address, > + IN UINT16 OrData > + ) > +{ > + return MmioOr16 (Address, SwapBytes16 (OrData)); > +} > + > +/** > + MmioOr32 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param OrData The value to OR with the read value from the MMIO register. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT32 > +EFIAPI > +SwapMmioOr32 ( > + IN UINTN Address, > + IN UINT32 OrData > + ) > +{ > + return MmioOr32 (Address, SwapBytes32 (OrData)); > +} > + > +/** > + MmioOr64 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param OrData The value to OR with the read value from the MMIO register. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT64 > +EFIAPI > +SwapMmioOr64 ( > + IN UINTN Address, > + IN UINT64 OrData > + ) > +{ > + return MmioOr64 (Address, SwapBytes64 (OrData)); > +} > + > +/** > + MmioAnd16 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param AndData The value to AND with the read value from the MMIO register. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT16 > +EFIAPI > +SwapMmioAnd16 ( > + IN UINTN Address, > + IN UINT16 AndData > + ) > +{ > + return MmioAnd16 (Address, SwapBytes16 (AndData)); > +} > + > +/** > + MmioAnd32 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param AndData The value to AND with the read value from the MMIO register. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT32 > +EFIAPI > +SwapMmioAnd32 ( > + IN UINTN Address, > + IN UINT32 AndData > + ) > +{ > + return MmioAnd32 (Address, SwapBytes32 (AndData)); > +} > + > +/** > + MmioAnd64 for Big-Endian modules. > + > + @param Address The MMIO register to write. > + @param AndData The value to AND with the read value from the MMIO register. > + > + @return The value written back to the MMIO register. > + > +**/ > +UINT64 > +EFIAPI > +SwapMmioAnd64 ( > + IN UINTN Address, > + IN UINT64 AndData > + ) > +{ > + return MmioAnd64 (Address, SwapBytes64 (AndData)); > +} > + > +STATIC MMIO_OPERATIONS_16 SwappingFunctions16 = { > + SwapMmioRead16, > + SwapMmioWrite16, > + SwapMmioOr16, > + SwapMmioAnd16, > + SwapMmioAndThenOr16, > +}; > + > +STATIC MMIO_OPERATIONS_16 NonSwappingFunctions16 = { > + MmioRead16, > + MmioWrite16, > + MmioOr16, > + MmioAnd16, > + MmioAndThenOr16, > +}; > + > +STATIC MMIO_OPERATIONS_32 SwappingFunctions32 = { > + SwapMmioRead32, > + SwapMmioWrite32, > + SwapMmioOr32, > + SwapMmioAnd32, > + SwapMmioAndThenOr32, > +}; > + > +STATIC MMIO_OPERATIONS_32 NonSwappingFunctions32 = { > + MmioRead32, > + MmioWrite32, > + MmioOr32, > + MmioAnd32, > + MmioAndThenOr32, > +}; > + > +STATIC MMIO_OPERATIONS_64 SwappingFunctions64 = { > + SwapMmioRead64, > + SwapMmioWrite64, > + SwapMmioOr64, > + SwapMmioAnd64, > + SwapMmioAndThenOr64, > +}; > + > +STATIC MMIO_OPERATIONS_64 NonSwappingFunctions64 = { > + MmioRead64, > + MmioWrite64, > + MmioOr64, > + MmioAnd64, > + MmioAndThenOr64, > +}; > + > +/** > + Function to return pointer to 16 bit Mmio operations. > + > + @param Swap Flag to tell if Swap is needed or not > + on Mmio Operations. > + > + @return Pointer to Mmio Operations. > + > +**/ > +MMIO_OPERATIONS_16 * > +GetMmioOperations16 (BOOLEAN Swap) { > + if (Swap) { > + return &SwappingFunctions16; > + } else { > + return &NonSwappingFunctions16; > + } > +} > + > +/** > + Function to return pointer to 32 bit Mmio operations. > + > + @param Swap Flag to tell if Swap is needed or not > + on Mmio Operations. > + > + @return Pointer to Mmio Operations. > + > +**/ > +MMIO_OPERATIONS_32 * > +GetMmioOperations32 (BOOLEAN Swap) { > + if (Swap) { > + return &SwappingFunctions32; > + } else { > + return &NonSwappingFunctions32; > + } > +} > + > +/** > + Function to return pointer to 64 bit Mmio operations. > + > + @param Swap Flag to tell if Swap is needed or not > + on Mmio Operations. > + > + @return Pointer to Mmio Operations. > + > +**/ > +MMIO_OPERATIONS_64 * > +GetMmioOperations64 (BOOLEAN Swap) { > + if (Swap) { > + return &SwappingFunctions64; > + } else { > + return &NonSwappingFunctions64; > + } > +} > diff --git a/Silicon/NXP/Library/IoAccessLib/IoAccessLib.inf b/Silicon/NXP/Library/IoAccessLib/IoAccessLib.inf > new file mode 100644 > index 0000000..e2e7606 > --- /dev/null > +++ b/Silicon/NXP/Library/IoAccessLib/IoAccessLib.inf > @@ -0,0 +1,32 @@ > +## @IoAccessLib.inf > + > +# Copyright 2017 NXP > +# > +# This program and the accompanying materials > +# are licensed and made available under the terms and conditions of the BSD License > +# which accompanies this distribution. The full text of the license may be found at > +# http://opensource.org/licenses/bsd-license.php > +# > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +# > +## > + > +[Defines] > + INF_VERSION = 0x0001001A > + BASE_NAME = IoAccessLib > + FILE_GUID = 28d77333-77eb-4faf-8735-130e5eb3e343 > + MODULE_TYPE = BASE > + VERSION_STRING = 1.0 > + LIBRARY_CLASS = IoAccessLib > + > +[Sources.common] > + IoAccessLib.c > + > +[Packages] > + MdeModulePkg/MdeModulePkg.dec > + MdePkg/MdePkg.dec > + Silicon/NXP/NxpQoriqLs.dec > + > +[LibraryClasses] > + IoLib > -- > 1.9.1 >