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From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: edk2-devel@lists.01.org
Subject: [PATCH edk2-platforms 2/3] Silicon/SynQuacer/AcpiTables: expose second UART to the OS
Date: Wed, 26 Dec 2018 14:25:29 +0100	[thread overview]
Message-ID: <20181226132530.8445-3-ard.biesheuvel@linaro.org> (raw)
In-Reply-To: <20181226132530.8445-1-ard.biesheuvel@linaro.org>

Align the DSDT with the device tree, which already exposes the second
UART to the OS. Since existing OSes will not support the SCX0006 HID
(which has only been allocated very recently), expose the DesignWare
FUART with a compatible ID (CID) of 'HISI0031', which is associated
with the same driver in Linux since at least release v4.9.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
 Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h |  4 ++++
 Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl          | 19 +++++++++++++++++++
 2 files changed, 23 insertions(+)

diff --git a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h b/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
index 28d4afabd2c8..b0fcc306c1ae 100644
--- a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
+++ b/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
@@ -76,4 +76,8 @@
 #define SYNQUACER_UART0_BASE            0x2A400000
 #define SYNQUACER_UART0_SIZE            SIZE_4KB
 
+// DesignWare FUART
+#define SYNQUACER_UART1_BASE            0x51040000
+#define SYNQUACER_UART1_SIZE            SIZE_4KB
+
 #endif
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl b/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
index ddb456d1dc70..aab4fbf0e6b4 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
@@ -142,6 +142,25 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "SNI", "SYNQUACR",
       })
     }
 
+    // DesignWare FUART
+    Device (COM1) {
+      Name (_HID, "SCX0006")
+      Name (_CID, "HISI0031")
+      Name (_UID, Zero)
+      Name (_CRS, ResourceTemplate () {
+        Memory32Fixed (ReadWrite, SYNQUACER_UART1_BASE, SYNQUACER_UART1_SIZE)
+        Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 200 }
+      })
+      Name (_DSD, Package () {
+        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+        Package () {
+          Package () { "clock-frequency", 62500000 },
+          Package () { "reg-io-width", 4 },
+          Package () { "reg-shift", 2 },
+        }
+      })
+    }
+
     Device (NET0) {
       Name (_HID, "SCX0001")
       Name (_UID, Zero)
-- 
2.19.2



  parent reply	other threads:[~2018-12-26 13:25 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-26 13:25 [PATCH edk2-platforms 0/3] synquacer multi-uart support Ard Biesheuvel
2018-12-26 13:25 ` [PATCH edk2-platforms 1/3] Silicon/SynQuacer/AcpiTables: don't use PCD for PL011 base Ard Biesheuvel
2018-12-26 13:25 ` Ard Biesheuvel [this message]
2018-12-26 13:25 ` [PATCH edk2-platforms 3/3] Silicon/SynQuacer: add support for DEBUG output on second UART Ard Biesheuvel
2019-01-11 17:58   ` Leif Lindholm
2019-01-12 18:18     ` Mark Kettenis
2019-01-14 23:18       ` Ard Biesheuvel

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