From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::342; helo=mail-wm1-x342.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm1-x342.google.com (mail-wm1-x342.google.com [IPv6:2a00:1450:4864:20::342]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 830EB2194D3AE for ; Wed, 26 Dec 2018 05:25:42 -0800 (PST) Received: by mail-wm1-x342.google.com with SMTP id a62so14566098wmh.4 for ; Wed, 26 Dec 2018 05:25:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=3HjoHLdWCbAsCYD41jIEwg6uq1F2OE5KF69ITdgVzK4=; b=MNvfQZ/f6rNd5us0RSm/4Cprqq6lbLgqHtNg3pT0S5Df3NEzgliIUiVzF0GojROjhJ FoR0h9eRoAx+HhjNJgl5bx02OLsE26aeJKdQkIMt+/dRZEJhkRFdfauHpGDzEzbbxJ3O 0KhMKYoiLv2Fk7f7fcEjiFvSZGiFqr6l4dmC8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3HjoHLdWCbAsCYD41jIEwg6uq1F2OE5KF69ITdgVzK4=; b=bB0P2eQieu90wVx4JrLb8dz2cE9RvEFBuzDEHycR+ip3FIjCyOOatV1cfiRm4DMXFD U0/8nA4+iTClKSZEfYpTMsvRdIjjVqMvEzZ3f5eg+bC9TjlHiCO1yGjLFMwZM5u/S87H UFH1Jl7JojNWiGXqskmqUmG8HUbIRpKrRiBmtyVl5bDHFlNsZ/KNKkk9s7Ey5VSwzdxz VE0vM/SMfjUkXwkVBMkHJaitAUcxtdRxHsKqcvhjl3dWnaDm1xNJDnoFdJRFez8mwCKF COIX/8LLd/4ejsxp6k5HhV3wOwN05YySf6/u+3gDD6It9WfTnjUQSp7oickizyaJ5BJc d42Q== X-Gm-Message-State: AA+aEWaZs5L4YKHcedEaJD4zFOnlcc+1GBXcWWY7H7ZpoykSWzdoA++b jJQ9criJx9LGVzHEFNILCerkZMhqHiGEQw== X-Google-Smtp-Source: AFSGD/XUi7lrnXWi/iKWBzhCjuYAe+nNytPbPtd6RvXVAvZAsP9bWtM0KMhqVVaP6alJ1rFT1U0IdA== X-Received: by 2002:a1c:5892:: with SMTP id m140mr18280461wmb.60.1545830740615; Wed, 26 Dec 2018 05:25:40 -0800 (PST) Received: from localhost.localdomain (laubervilliers-657-1-83-120.w92-154.abo.wanadoo.fr. [92.154.90.120]) by smtp.gmail.com with ESMTPSA id z17sm22268820wrv.2.2018.12.26.05.25.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 26 Dec 2018 05:25:39 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Wed, 26 Dec 2018 14:25:30 +0100 Message-Id: <20181226132530.8445-4-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181226132530.8445-1-ard.biesheuvel@linaro.org> References: <20181226132530.8445-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Subject: [PATCH edk2-platforms 3/3] Silicon/SynQuacer: add support for DEBUG output on second UART X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 26 Dec 2018 13:25:42 -0000 Content-Transfer-Encoding: 8bit On headless server systems where the PL011 serial port is the primary console, having DEBUG output on the same port can be annoying, since DEBUG output gets lost when the console driver clears the screen or positions the cursor using control characters. So add the ability to emit the DEBUG output on the DesignWare FUART (which is exposed via the LS connector on DeveloperBox) Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Platform/Socionext/DeveloperBox/DeveloperBox.dsc | 42 +++++++++++++++++--- Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c | 3 ++ 2 files changed, 40 insertions(+), 5 deletions(-) diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc index ed11aed798b7..da450a132798 100644 --- a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc +++ b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc @@ -28,6 +28,8 @@ FLASH_DEFINITION = Platform/Socionext/DeveloperBox/DeveloperBox.fdf BUILD_NUMBER = 1 + DEFINE DEBUG_ON_UART1 = FALSE + [BuildOptions] RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG -U_FORTIFY_SOURCE -D_FORTIFY_SOURCE=0 @@ -120,9 +122,17 @@ DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf DebugAgentTimerLib|EmbeddedPkg/Library/DebugAgentTimerLibNull/DebugAgentTimerLibNull.inf PL011UartClockLib|ArmPlatformPkg/Library/PL011UartClockLib/PL011UartClockLib.inf - SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf +!if $(DEBUG_ON_UART1) == FALSE + SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf +!else + SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf + PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePlatformHookLibNull.inf + PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf + PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf +!endif + HttpLib|MdeModulePkg/Library/DxeHttpLib/DxeHttpLib.inf TcpIoLib|MdeModulePkg/Library/DxeTcpIoLib/DxeTcpIoLib.inf @@ -253,13 +263,26 @@ !endif ## PL011 - Serial Terminal - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x2a400000 - gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200 - gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0 gArmPlatformTokenSpaceGuid.PL011UartInteger|0 gArmPlatformTokenSpaceGuid.PL011UartFractional|0 gArmPlatformTokenSpaceGuid.PL011UartClkInHz|62500000 + ## DesignWare FUART + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|TRUE + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl|FALSE + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|62500000 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride|4 + + ## Shared UART settings + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200 + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0 + +!if $(DEBUG_ON_UART1) == FALSE + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x2a400000 +!else + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x51040000 +!endif + # # ARM Generic Interrupt Controller # @@ -505,7 +528,16 @@ } MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf - MdeModulePkg/Universal/SerialDxe/SerialDxe.inf + MdeModulePkg/Universal/SerialDxe/SerialDxe.inf { +!if $(DEBUG_ON_UART1) == TRUE + + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x2a400000 + + SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf + # suppress debug output from SerialDxe itself which would go to the PL011 + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf +!endif + } MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c index 1402ecafce4a..e68997e05573 100644 --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c @@ -118,6 +118,9 @@ STATIC CONST ARM_MEMORY_REGION_DESCRIPTOR mVirtualMemoryTable[] = { // NETSEC/eMMC SMMU ARM_DEVICE_REGION (SYNQUACER_SCB_SMMU_BASE, SYNQUACER_SCB_SMMU_SIZE), + + // DesignWare FUART + ARM_DEVICE_REGION (SYNQUACER_UART1_BASE, SYNQUACER_UART1_SIZE), }; STATIC -- 2.19.2