From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.88; helo=mga01.intel.com; envelope-from=chasel.chiu@intel.com; receiver=edk2-devel@lists.01.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 032962119EF45 for ; Wed, 26 Dec 2018 06:01:01 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Dec 2018 06:01:01 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,401,1539673200"; d="scan'208";a="286740459" Received: from cchiu4-mobl1.gar.corp.intel.com ([10.252.187.49]) by orsmga005.jf.intel.com with ESMTP; 26 Dec 2018 06:00:59 -0800 From: "Chasel, Chiu" To: edk2-devel@lists.01.org Cc: Bob Feng , Liming Gao , Yonghong Zhu , Chasel Chiu Date: Wed, 26 Dec 2018 22:00:49 +0800 Message-Id: <20181226140049.14228-1-chasel.chiu@intel.com> X-Mailer: git-send-email 2.13.3.windows.1 Subject: [PATCH] BaseTools/GenFv: Support SecCore and PeiCore in different FV X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 26 Dec 2018 14:01:02 -0000 REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1423 There is usage model that SecCore and PeiCore are in different FVs. Update BaseTools to support this usage model. Test: Verified on internal platform with the case SecCore and PeiCore in different FVs and built/booted successfully. Cc: Bob Feng Cc: Liming Gao Cc: Yonghong Zhu Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chasel Chiu --- BaseTools/Source/C/GenFv/GenFvInternalLib.c | 82 +++++++++++++++++++++++++++++++++++++++++----------------------------------------- 1 file changed, 41 insertions(+), 41 deletions(-) diff --git a/BaseTools/Source/C/GenFv/GenFvInternalLib.c b/BaseTools/Source/C/GenFv/GenFvInternalLib.c index 6a874f4e94..32bbcce0a6 100644 --- a/BaseTools/Source/C/GenFv/GenFvInternalLib.c +++ b/BaseTools/Source/C/GenFv/GenFvInternalLib.c @@ -1655,43 +1655,42 @@ Returns: // // Find the PEI Core // + PeiCorePhysicalAddress = 0; Status = GetFileByType (EFI_FV_FILETYPE_PEI_CORE, 1, &PeiCoreFile); - if (EFI_ERROR (Status) || PeiCoreFile == NULL) { - Error (NULL, 0, 3000, "Invalid", "could not find the PEI core in the FV."); - return EFI_ABORTED; - } - // - // PEI Core found, now find PE32 or TE section - // - Status = GetSectionByType (PeiCoreFile, EFI_SECTION_PE32, 1, &Pe32Section); - if (Status == EFI_NOT_FOUND) { - Status = GetSectionByType (PeiCoreFile, EFI_SECTION_TE, 1, &Pe32Section); - } + if (!EFI_ERROR (Status) && (PeiCoreFile != NULL)) { + // + // PEI Core found, now find PE32 or TE section + // + Status = GetSectionByType (PeiCoreFile, EFI_SECTION_PE32, 1, &Pe32Section); + if (Status == EFI_NOT_FOUND) { + Status = GetSectionByType (PeiCoreFile, EFI_SECTION_TE, 1, &Pe32Section); + } - if (EFI_ERROR (Status)) { - Error (NULL, 0, 3000, "Invalid", "could not find either a PE32 or a TE section in PEI core file."); - return EFI_ABORTED; - } + if (EFI_ERROR (Status)) { + Error (NULL, 0, 3000, "Invalid", "could not find either a PE32 or a TE section in PEI core file."); + return EFI_ABORTED; + } - SecHeaderSize = GetSectionHeaderLength(Pe32Section.CommonHeader); - Status = GetPe32Info ( - (VOID *) ((UINTN) Pe32Section.Pe32Section + SecHeaderSize), - &EntryPoint, - &BaseOfCode, - &MachineType - ); + SecHeaderSize = GetSectionHeaderLength(Pe32Section.CommonHeader); + Status = GetPe32Info ( + (VOID *) ((UINTN) Pe32Section.Pe32Section + SecHeaderSize), + &EntryPoint, + &BaseOfCode, + &MachineType + ); - if (EFI_ERROR (Status)) { - Error (NULL, 0, 3000, "Invalid", "could not get the PE32 entry point for the PEI core."); - return EFI_ABORTED; + if (EFI_ERROR (Status)) { + Error (NULL, 0, 3000, "Invalid", "could not get the PE32 entry point for the PEI core."); + return EFI_ABORTED; + } + // + // Physical address is FV base + offset of PE32 + offset of the entry point + // + PeiCorePhysicalAddress = FvInfo->BaseAddress; + PeiCorePhysicalAddress += (UINTN) Pe32Section.Pe32Section + SecHeaderSize - (UINTN) FvImage->FileImage; + PeiCorePhysicalAddress += EntryPoint; + DebugMsg (NULL, 0, 9, "PeiCore physical entry point address", "Address = 0x%llX", (unsigned long long) PeiCorePhysicalAddress); } - // - // Physical address is FV base + offset of PE32 + offset of the entry point - // - PeiCorePhysicalAddress = FvInfo->BaseAddress; - PeiCorePhysicalAddress += (UINTN) Pe32Section.Pe32Section + SecHeaderSize - (UINTN) FvImage->FileImage; - PeiCorePhysicalAddress += EntryPoint; - DebugMsg (NULL, 0, 9, "PeiCore physical entry point address", "Address = 0x%llX", (unsigned long long) PeiCorePhysicalAddress); if (MachineType == EFI_IMAGE_MACHINE_IA64) { // @@ -1749,16 +1748,17 @@ Returns: *SecCoreEntryAddressPtr = SecCorePhysicalAddress; } else if (MachineType == EFI_IMAGE_MACHINE_IA32 || MachineType == EFI_IMAGE_MACHINE_X64) { - // - // Get the location to update - // - Ia32ResetAddressPtr = (UINT32 *) ((UINTN) FvImage->Eof - IA32_PEI_CORE_ENTRY_OFFSET); - - // - // Write lower 32 bits of physical address for Pei Core entry - // - *Ia32ResetAddressPtr = (UINT32) PeiCorePhysicalAddress; + if (PeiCorePhysicalAddress != 0) { + // + // Get the location to update + // + Ia32ResetAddressPtr = (UINT32 *) ((UINTN) FvImage->Eof - IA32_PEI_CORE_ENTRY_OFFSET); + // + // Write lower 32 bits of physical address for Pei Core entry + // + *Ia32ResetAddressPtr = (UINT32) PeiCorePhysicalAddress; + } // // Write SecCore Entry point relative address into the jmp instruction in reset vector. // -- 2.13.3.windows.1