From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.93; helo=mga11.intel.com; envelope-from=chao.b.zhang@intel.com; receiver=edk2-devel@lists.01.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 7FC03211A2D91 for ; Wed, 2 Jan 2019 17:13:04 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 02 Jan 2019 17:13:04 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,433,1539673200"; d="scan'208";a="308510664" Received: from shwde9099.ccr.corp.intel.com ([10.239.9.133]) by fmsmga005.fm.intel.com with ESMTP; 02 Jan 2019 17:13:02 -0800 From: "Zhang, Chao B" To: edk2-devel@lists.01.org Cc: Zhang Chao B , Jiewen Yao , Thomas Rydman Date: Thu, 3 Jan 2019 09:12:56 +0800 Message-Id: <20190103011256.15308-1-chao.b.zhang@intel.com> X-Mailer: git-send-email 2.16.2.windows.1 Subject: [Patch] SecurityPkg/Tcg: Fix Warnings and Remarks reported by IASL X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 03 Jan 2019 01:13:04 -0000 Addressed warnings and remarks reported by IASL.EXE. Some methods had unused arguments. A method was returning a value when it should not. Cc: Zhang Chao B Cc: Jiewen Yao Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Thomas Rydman Signed-off-by: Zhang, Chao B --- SecurityPkg/Tcg/Tcg2Smm/Tpm.asl | 140 ++++++++++++++++++++-------------------- SecurityPkg/Tcg/TcgSmm/Tpm.asl | 26 ++++---- 2 files changed, 82 insertions(+), 84 deletions(-) diff --git a/SecurityPkg/Tcg/Tcg2Smm/Tpm.asl b/SecurityPkg/Tcg/Tcg2Smm/Tpm.asl index 471b6b1fa1..903252f7d7 100644 --- a/SecurityPkg/Tcg/Tcg2Smm/Tpm.asl +++ b/SecurityPkg/Tcg/Tcg2Smm/Tpm.asl @@ -158,72 +158,70 @@ DefinitionBlock ( Method(_SRS,1,Serialized) { // // Do not configure Interrupt if IRQ Num is configured 0 by default // - If (LEqual(IRQN, 0)) { - Return (0) - } - - // - // Update resource descriptor - // Use the field name to identify the offsets in the argument - // buffer and RES0 buffer. - // - CreateDWordField(Arg0, ^INTR._INT, IRQ0) - CreateDWordField(RES0, ^INTR._INT, LIRQ) - Store(IRQ0, LIRQ) - Store(IRQ0, IRQN) + If (LNotEqual(IRQN, 0)) { + // + // Update resource descriptor + // Use the field name to identify the offsets in the argument + // buffer and RES0 buffer. + // + CreateDWordField(Arg0, ^INTR._INT, IRQ0) + CreateDWordField(RES0, ^INTR._INT, LIRQ) + Store(IRQ0, LIRQ) + Store(IRQ0, IRQN) - CreateBitField(Arg0, ^INTR._HE, ITRG) - CreateBitField(RES0, ^INTR._HE, LTRG) - Store(ITRG, LTRG) + CreateBitField(Arg0, ^INTR._HE, ITRG) + CreateBitField(RES0, ^INTR._HE, LTRG) + Store(ITRG, LTRG) - CreateBitField(Arg0, ^INTR._LL, ILVL) - CreateBitField(RES0, ^INTR._LL, LLVL) - Store(ILVL, LLVL) + CreateBitField(Arg0, ^INTR._LL, ILVL) + CreateBitField(RES0, ^INTR._LL, LLVL) + Store(ILVL, LLVL) - // - // Update TPM FIFO PTP/TIS interface only, identified by TPM_INTERFACE_ID_x lowest - // nibble. - // 0000 - FIFO interface as defined in PTP for TPM 2.0 is active - // 1111 - FIFO interface as defined in TIS1.3 is active - // - If (LOr(LEqual (And (TID0, 0x0F), 0x00), LEqual (And (TID0, 0x0F), 0x0F))) { // - // If FIFO interface, interrupt vector register is - // available. TCG PTP specification allows only - // values 1..15 in this field. For other interrupts - // the field should stay 0. + // Update TPM FIFO PTP/TIS interface only, identified by TPM_INTERFACE_ID_x lowest + // nibble. + // 0000 - FIFO interface as defined in PTP for TPM 2.0 is active + // 1111 - FIFO interface as defined in TIS1.3 is active // - If (LLess (IRQ0, 16)) { - Store (And(IRQ0, 0xF), INTV) - } - // - // Interrupt enable register (TPM_INT_ENABLE_x) bits 3:4 - // contains settings for interrupt polarity. - // The other bits of the byte enable individual interrupts. - // They should be all be zero, but to avoid changing the - // configuration, the other bits are be preserved. - // 00 - high level - // 01 - low level - // 10 - rising edge - // 11 - falling edge - // - // ACPI spec definitions: - // _HE: '1' is Edge, '0' is Level - // _LL: '1' is ActiveHigh, '0' is ActiveLow (inverted from TCG spec) - // - If (LEqual (ITRG, 1)) { - Or(INTE, 0x00000010, INTE) - } Else { - And(INTE, 0xFFFFFFEF, INTE) - } - if (LEqual (ILVL, 0)) { - Or(INTE, 0x00000008, INTE) - } Else { - And(INTE, 0xFFFFFFF7, INTE) + If (LOr(LEqual (And (TID0, 0x0F), 0x00), LEqual (And (TID0, 0x0F), 0x0F))) { + // + // If FIFO interface, interrupt vector register is + // available. TCG PTP specification allows only + // values 1..15 in this field. For other interrupts + // the field should stay 0. + // + If (LLess (IRQ0, 16)) { + Store (And(IRQ0, 0xF), INTV) + } + // + // Interrupt enable register (TPM_INT_ENABLE_x) bits 3:4 + // contains settings for interrupt polarity. + // The other bits of the byte enable individual interrupts. + // They should be all be zero, but to avoid changing the + // configuration, the other bits are be preserved. + // 00 - high level + // 01 - low level + // 10 - rising edge + // 11 - falling edge + // + // ACPI spec definitions: + // _HE: '1' is Edge, '0' is Level + // _LL: '1' is ActiveHigh, '0' is ActiveLow (inverted from TCG spec) + // + If (LEqual (ITRG, 1)) { + Or(INTE, 0x00000010, INTE) + } Else { + And(INTE, 0xFFFFFFEF, INTE) + } + if (LEqual (ILVL, 0)) { + Or(INTE, 0x00000008, INTE) + } Else { + And(INTE, 0xFFFFFFF7, INTE) + } } } } Method(_PRS,0,Serialized) @@ -282,16 +280,16 @@ DefinitionBlock ( } // // TCG Hardware Information // - Method (HINF, 3, Serialized, 0, {BuffObj, PkgObj}, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj + Method (HINF, 1, Serialized, 0, {BuffObj, PkgObj}, {UnknownObj}) // IntObj { // // Switch by function index // - Switch (ToInteger(Arg1)) + Switch (ToInteger(Arg0)) { Case (0) { // // Standard query @@ -331,16 +329,16 @@ DefinitionBlock ( }) // // TCG Physical Presence Interface // - Method (TPPI, 3, Serialized, 0, {BuffObj, PkgObj, IntObj, StrObj}, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj + Method (TPPI, 2, Serialized, 0, {BuffObj, PkgObj, IntObj, StrObj}, {UnknownObj, UnknownObj}) // IntObj, PkgObj { // // Switch by function index // - Switch (ToInteger(Arg1)) + Switch (ToInteger(Arg0)) { Case (0) { // // Standard query, supports function 1-8 @@ -358,11 +356,11 @@ DefinitionBlock ( { // // b) Submit TPM Operation Request to Pre-OS Environment // - Store (DerefOf (Index (Arg2, 0x00)), PPRQ) + Store (DerefOf (Index (Arg1, 0x00)), PPRQ) Store (0, PPRM) Store (0x02, PPIP) // // Trigger the SMI interrupt @@ -419,14 +417,14 @@ DefinitionBlock ( { // // g) Submit TPM Operation Request to Pre-OS Environment 2 // Store (7, PPIP) - Store (DerefOf (Index (Arg2, 0x00)), PPRQ) + Store (DerefOf (Index (Arg1, 0x00)), PPRQ) Store (0, PPRM) If (LEqual (PPRQ, 23)) { - Store (DerefOf (Index (Arg2, 0x01)), PPRM) + Store (DerefOf (Index (Arg1, 0x01)), PPRM) } // // Trigger the SMI interrupt // @@ -437,11 +435,11 @@ DefinitionBlock ( { // // e) Get User Confirmation Status for Operation // Store (8, PPIP) - Store (DerefOf (Index (Arg2, 0x00)), UCRQ) + Store (DerefOf (Index (Arg1, 0x00)), UCRQ) // // Trigger the SMI interrupt // Store (PPIN, IOB2) @@ -452,16 +450,16 @@ DefinitionBlock ( Default {BreakPoint} } Return (1) } - Method (TMCI, 3, Serialized, 0, IntObj, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj + Method (TMCI, 2, Serialized, 0, IntObj, {UnknownObj, UnknownObj}) // IntObj, PkgObj { // // Switch by function index // - Switch (ToInteger (Arg1)) + Switch (ToInteger (Arg0)) { Case (0) { // // Standard query, supports function 1-1 @@ -471,11 +469,11 @@ DefinitionBlock ( Case (1) { // // Save the Operation Value of the Request to MORD (reserved memory) // - Store (DerefOf (Index (Arg2, 0x00)), MORD) + Store (DerefOf (Index (Arg1, 0x00)), MORD) // // Trigger the SMI through ACPI _DSM method. // Store (0x01, MCIP) @@ -497,27 +495,27 @@ DefinitionBlock ( // // TCG Hardware Information // If(LEqual(Arg0, ToUUID ("cf8e16a5-c1e8-4e25-b712-4f54a96702c8"))) { - Return (HINF (Arg1, Arg2, Arg3)) + Return (HINF (Arg2)) } // // TCG Physical Presence Interface // If(LEqual(Arg0, ToUUID ("3dddfaa6-361b-4eb4-a424-8d10089d1653"))) { - Return (TPPI (Arg1, Arg2, Arg3)) + Return (TPPI (Arg2, Arg3)) } // // TCG Memory Clear Interface // If(LEqual(Arg0, ToUUID ("376054ed-cc13-4675-901c-4756d7f2d45d"))) { - Return (TMCI (Arg1, Arg2, Arg3)) + Return (TMCI (Arg2, Arg3)) } Return (Buffer () {0}) } } diff --git a/SecurityPkg/Tcg/TcgSmm/Tpm.asl b/SecurityPkg/Tcg/TcgSmm/Tpm.asl index 2114283b45..f6b129c248 100644 --- a/SecurityPkg/Tcg/TcgSmm/Tpm.asl +++ b/SecurityPkg/Tcg/TcgSmm/Tpm.asl @@ -118,16 +118,16 @@ DefinitionBlock ( } // // TCG Hardware Information // - Method (HINF, 3, Serialized, 0, {BuffObj, PkgObj}, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj + Method (HINF, 1, Serialized, 0, {BuffObj, PkgObj}, {UnknownObj}) // IntObj { // // Switch by function index // - Switch (ToInteger(Arg1)) + Switch (ToInteger(Arg0)) { Case (0) { // // Standard query @@ -167,16 +167,16 @@ DefinitionBlock ( }) // // TCG Physical Presence Interface // - Method (TPPI, 3, Serialized, 0, {BuffObj, PkgObj, IntObj, StrObj}, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj + Method (TPPI, 2, Serialized, 0, {BuffObj, PkgObj, IntObj, StrObj}, {UnknownObj, UnknownObj}) // IntObj, PkgObj { // // Switch by function index // - Switch (ToInteger(Arg1)) + Switch (ToInteger(Arg0)) { Case (0) { // // Standard query, supports function 1-8 @@ -194,11 +194,11 @@ DefinitionBlock ( { // // b) Submit TPM Operation Request to Pre-OS Environment // - Store (DerefOf (Index (Arg2, 0x00)), PPRQ) + Store (DerefOf (Index (Arg1, 0x00)), PPRQ) Store (0x02, PPIP) // // Trigger the SMI interrupt // @@ -254,11 +254,11 @@ DefinitionBlock ( { // // g) Submit TPM Operation Request to Pre-OS Environment 2 // Store (7, PPIP) - Store (DerefOf (Index (Arg2, 0x00)), PPRQ) + Store (DerefOf (Index (Arg1, 0x00)), PPRQ) // // Trigger the SMI interrupt // Store (PPIN, IOB2) @@ -268,11 +268,11 @@ DefinitionBlock ( { // // e) Get User Confirmation Status for Operation // Store (8, PPIP) - Store (DerefOf (Index (Arg2, 0x00)), UCRQ) + Store (DerefOf (Index (Arg1, 0x00)), UCRQ) // // Trigger the SMI interrupt // Store (PPIN, IOB2) @@ -283,16 +283,16 @@ DefinitionBlock ( Default {BreakPoint} } Return (1) } - Method (TMCI, 3, Serialized, 0, IntObj, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj + Method (TMCI, 2, Serialized, 0, IntObj, {UnknownObj, UnknownObj}) // IntObj, PkgObj { // // Switch by function index // - Switch (ToInteger (Arg1)) + Switch (ToInteger (Arg0)) { Case (0) { // // Standard query, supports function 1-1 @@ -302,11 +302,11 @@ DefinitionBlock ( Case (1) { // // Save the Operation Value of the Request to MORD (reserved memory) // - Store (DerefOf (Index (Arg2, 0x00)), MORD) + Store (DerefOf (Index (Arg1, 0x00)), MORD) // // Trigger the SMI through ACPI _DSM method. // Store (0x01, MCIP) @@ -328,27 +328,27 @@ DefinitionBlock ( // // TCG Hardware Information // If(LEqual(Arg0, ToUUID ("cf8e16a5-c1e8-4e25-b712-4f54a96702c8"))) { - Return (HINF (Arg1, Arg2, Arg3)) + Return (HINF (Arg2)) } // // TCG Physical Presence Interface // If(LEqual(Arg0, ToUUID ("3dddfaa6-361b-4eb4-a424-8d10089d1653"))) { - Return (TPPI (Arg1, Arg2, Arg3)) + Return (TPPI (Arg2, Arg3)) } // // TCG Memory Clear Interface // If(LEqual(Arg0, ToUUID ("376054ed-cc13-4675-901c-4756d7f2d45d"))) { - Return (TMCI (Arg1, Arg2, Arg3)) + Return (TMCI (Arg2, Arg3)) } Return (Buffer () {0}) } } -- 2.16.2.windows.1