From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: edk2-devel@lists.01.org
Subject: [PATCH edk2-platforms 3/7] Silicon/SynQuacer/Fip006Dxe: implement standalone MM variant
Date: Fri, 4 Jan 2019 15:43:32 +0100 [thread overview]
Message-ID: <20190104144336.8941-4-ard.biesheuvel@linaro.org> (raw)
In-Reply-To: <20190104144336.8941-1-ard.biesheuvel@linaro.org>
Implement a variant of the FIP006 NOR flash driver that can execute
in standalone MM context. This is the foundation for hosting the
EFI authenticated variable store in the secure world.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/Fip006StandaloneMm.inf | 71 ++++++++
Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlashSmm.c | 182 ++++++++++++++++++++
2 files changed, 253 insertions(+)
diff --git a/Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/Fip006StandaloneMm.inf b/Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/Fip006StandaloneMm.inf
new file mode 100644
index 000000000000..2dcbfd7db892
--- /dev/null
+++ b/Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/Fip006StandaloneMm.inf
@@ -0,0 +1,71 @@
+## @file
+# Socionext FIP006 High-Speed SPI Controller with NOR Flash Driver
+#
+# Copyright (c) 2017, Socionext Inc. All rights reserved.<BR>
+# Copyright (c) 2017-2018, Linaro, Ltd. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+
+[Defines]
+ INF_VERSION = 0x0001001A
+ BASE_NAME = Fip006Dxe
+ FILE_GUID = 1b041d85-9b44-442b-a583-5cf008ef9060
+ MODULE_TYPE = MM_STANDALONE
+ VERSION_STRING = 0.1
+ PI_SPECIFICATION_VERSION = 0x00010032
+ ENTRY_POINT = NorFlashInitialise
+
+[Sources]
+ NorFlashSmm.c
+ NorFlash.c
+ NorFlash.h
+ NorFlashFvb.c
+
+[Packages]
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/Fip006Dxe.dec
+ StandaloneMmPkg/StandaloneMmPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ BaseMemoryLib
+ DebugLib
+ IoLib
+ MemoryAllocationLib
+ MmServicesTableLib
+ NorFlashInfoLib
+ NorFlashPlatformLib
+ StandaloneMmDriverEntryPoint
+
+[Guids]
+ gEfiAuthenticatedVariableGuid
+ gEfiSystemNvDataFvGuid
+ gEfiVariableGuid
+
+[Protocols]
+ gEfiSmmFirmwareVolumeBlockProtocolGuid
+
+[FixedPcd]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
+ gFip006DxeTokenSpaceGuid.PcdFip006DxeRegBaseAddress
+ gFip006DxeTokenSpaceGuid.PcdFip006DxeMemBaseAddress
+
+[Depex]
+ TRUE
diff --git a/Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlashSmm.c b/Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlashSmm.c
new file mode 100644
index 000000000000..bab3d9f4cd14
--- /dev/null
+++ b/Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlashSmm.c
@@ -0,0 +1,182 @@
+/** @file NorFlashSmm.c
+
+ Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
+ Copyright (c) 2017, Socionext Inc. All rights reserved.<BR>
+ Copyright (c) 2017, Linaro, Ltd. All rights reserved.<BR>
+
+ This program and the accompanying materials are licensed and made available
+ under the terms and conditions of the BSD License which accompanies this
+ distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiMm.h>
+
+#include <Library/MmServicesTableLib.h>
+
+#include "NorFlash.h"
+
+//
+// Global variable declarations
+//
+STATIC NOR_FLASH_INSTANCE **mNorFlashInstances;
+STATIC UINT32 mNorFlashDeviceCount;
+
+EFI_STATUS
+EFIAPI
+NorFlashFvbInitialize (
+ IN NOR_FLASH_INSTANCE* Instance
+ )
+{
+ EFI_STATUS Status;
+ UINT32 FvbNumLba;
+ UINTN BlockSize;
+
+ DEBUG ((DEBUG_BLKIO,"NorFlashFvbInitialize\n"));
+
+ BlockSize = Instance->BlockSize;
+
+ // FirmwareVolumeHeader->FvLength is declared to have the Variable area
+ // AND the FTW working area AND the FTW Spare contiguous.
+ ASSERT (PcdGet32 (PcdFlashNvStorageVariableBase) +
+ PcdGet32 (PcdFlashNvStorageVariableSize) ==
+ PcdGet32 (PcdFlashNvStorageFtwWorkingBase));
+ ASSERT (PcdGet32 (PcdFlashNvStorageFtwWorkingBase) +
+ PcdGet32 (PcdFlashNvStorageFtwWorkingSize) ==
+ PcdGet32 (PcdFlashNvStorageFtwSpareBase));
+
+ // Check if the size of the area is at least one block size
+ ASSERT ((PcdGet32 (PcdFlashNvStorageVariableSize) > 0) &&
+ (PcdGet32 (PcdFlashNvStorageVariableSize) / BlockSize > 0));
+ ASSERT ((PcdGet32 (PcdFlashNvStorageFtwWorkingSize) > 0) &&
+ (PcdGet32 (PcdFlashNvStorageFtwWorkingSize) / BlockSize > 0));
+ ASSERT ((PcdGet32 (PcdFlashNvStorageFtwSpareSize) > 0) &&
+ (PcdGet32 (PcdFlashNvStorageFtwSpareSize) / BlockSize > 0));
+
+ // Ensure the Variable areas are aligned on block size boundaries
+ ASSERT ((PcdGet32 (PcdFlashNvStorageVariableBase) % BlockSize) == 0);
+ ASSERT ((PcdGet32 (PcdFlashNvStorageFtwWorkingBase) % BlockSize) == 0);
+ ASSERT ((PcdGet32 (PcdFlashNvStorageFtwSpareBase) % BlockSize) == 0);
+
+
+ Instance->Initialized = TRUE;
+ mFlashNvStorageVariableBase = FixedPcdGet32 (PcdFlashNvStorageVariableBase);
+
+ // Set the index of the first LBA for the FVB
+ Instance->StartLba = (PcdGet32 (PcdFlashNvStorageVariableBase) -
+ Instance->RegionBaseAddress) / BlockSize;
+
+ // Determine if there is a valid header at the beginning of the NorFlash
+ Status = ValidateFvHeader (Instance);
+ if (EFI_ERROR (Status)) {
+ // There is no valid header, so time to install one.
+ DEBUG ((DEBUG_INFO, "%a: The FVB Header is not valid.\n", __FUNCTION__));
+ DEBUG ((DEBUG_INFO, "%a: Installing a correct one for this volume.\n",
+ __FUNCTION__));
+
+ // Erase all the NorFlash that is reserved for variable storage
+ FvbNumLba = (PcdGet32(PcdFlashNvStorageVariableSize) +
+ PcdGet32(PcdFlashNvStorageFtwWorkingSize) +
+ PcdGet32(PcdFlashNvStorageFtwSpareSize)) /
+ Instance->BlockSize;
+
+ Status = FvbEraseBlocks (&Instance->FvbProtocol, (EFI_LBA)0, FvbNumLba,
+ EFI_LBA_LIST_TERMINATOR);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ // Install all appropriate headers
+ Status = InitializeFvAndVariableStoreHeaders (Instance);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+ }
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+NorFlashInitialise (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_MM_SYSTEM_TABLE *MmSystemTable
+ )
+{
+ EFI_STATUS Status;
+ UINT32 Index;
+ NOR_FLASH_DESCRIPTION* NorFlashDevices;
+ BOOLEAN ContainVariableStorage;
+
+ Status = NorFlashPlatformInitialization ();
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR,
+ "NorFlashInitialise: Fail to initialize Nor Flash devices\n"));
+ return Status;
+ }
+
+ // Initialize NOR flash instances
+ Status = NorFlashPlatformGetDevices (&NorFlashDevices, &mNorFlashDeviceCount);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR,"NorFlashInitialise: Fail to get Nor Flash devices\n"));
+ return Status;
+ }
+
+ mNorFlashInstances = AllocatePool (sizeof(NOR_FLASH_INSTANCE*) *
+ mNorFlashDeviceCount);
+
+ for (Index = 0; Index < mNorFlashDeviceCount; Index++) {
+ // Check if this NOR Flash device contain the variable storage region
+ ContainVariableStorage =
+ (NorFlashDevices[Index].RegionBaseAddress <=
+ PcdGet32 (PcdFlashNvStorageVariableBase)) &&
+ (PcdGet32 (PcdFlashNvStorageVariableBase) +
+ PcdGet32 (PcdFlashNvStorageVariableSize) <=
+ NorFlashDevices[Index].RegionBaseAddress + NorFlashDevices[Index].Size);
+
+ Status = NorFlashCreateInstance (
+ PcdGet32 (PcdFip006DxeRegBaseAddress),
+ NorFlashDevices[Index].DeviceBaseAddress,
+ NorFlashDevices[Index].RegionBaseAddress,
+ NorFlashDevices[Index].Size,
+ Index,
+ NorFlashDevices[Index].BlockSize,
+ ContainVariableStorage,
+ &mNorFlashInstances[Index]
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR,
+ "NorFlashInitialise: Fail to create instance for NorFlash[%d]\n",
+ Index));
+ continue;
+ }
+ Status = gMmst->MmInstallProtocolInterface (
+ &mNorFlashInstances[Index]->Handle,
+ &gEfiSmmFirmwareVolumeBlockProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ &mNorFlashInstances[Index]->FvbProtocol
+ );
+ ASSERT_EFI_ERROR (Status);
+ }
+
+ return Status;
+}
+
+VOID
+EFIAPI
+NorFlashLock (
+ NOR_FLASH_LOCK_CONTEXT *Context
+ )
+{
+}
+
+VOID
+EFIAPI
+NorFlashUnlock (
+ NOR_FLASH_LOCK_CONTEXT *Context
+ )
+{
+}
--
2.17.1
next prev parent reply other threads:[~2019-01-04 14:43 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-04 14:43 [PATCH edk2-platforms 0/7] Silicon/SynQuacer: implement SMM based secure boot Ard Biesheuvel
2019-01-04 14:43 ` [PATCH edk2-platforms 1/7] Silicon/SynQuacer/Fip006Dxe: drop block I/O and disk I/O routines Ard Biesheuvel
2019-01-17 9:50 ` Leif Lindholm
2019-01-17 10:59 ` Ard Biesheuvel
2019-01-04 14:43 ` [PATCH edk2-platforms 2/7] Silicon/SynQuacer/Fip006Dxe: factor out DXE specific pieces Ard Biesheuvel
2019-01-17 10:10 ` Leif Lindholm
2019-01-17 11:27 ` Ard Biesheuvel
2019-01-21 16:16 ` Ard Biesheuvel
2019-01-21 16:46 ` Leif Lindholm
2019-01-21 16:47 ` Ard Biesheuvel
2019-01-21 16:53 ` Leif Lindholm
2019-01-04 14:43 ` Ard Biesheuvel [this message]
2019-01-04 14:43 ` [PATCH edk2-platforms 4/7] Silicon/SynQuacer/Fip006Dxe: use proper accessor for unaligned access Ard Biesheuvel
2019-01-04 14:43 ` [PATCH edk2-platforms 5/7] Platform/DeveloperBox: create shared .DSC include file Ard Biesheuvel
2019-01-04 14:43 ` [PATCH edk2-platforms 6/7] Platform/DeveloperBox: add .DSC/.FDF description of MM components Ard Biesheuvel
2019-01-17 11:04 ` Leif Lindholm
2019-01-17 11:10 ` Ard Biesheuvel
2019-01-17 12:08 ` Leif Lindholm
2019-01-17 12:18 ` Ard Biesheuvel
2019-01-21 16:57 ` Ard Biesheuvel
2019-01-21 17:03 ` Leif Lindholm
2019-01-04 14:43 ` [PATCH edk2-platforms 7/7] Platform/DeveloperBox: add MM based UEFI secure boot support Ard Biesheuvel
2019-01-17 11:14 ` [PATCH edk2-platforms 0/7] Silicon/SynQuacer: implement SMM based secure boot Leif Lindholm
2019-01-21 17:40 ` Ard Biesheuvel
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