From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::544; helo=mail-ed1-x544.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-ed1-x544.google.com (mail-ed1-x544.google.com [IPv6:2a00:1450:4864:20::544]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 462E92194D3B3 for ; Fri, 4 Jan 2019 06:43:49 -0800 (PST) Received: by mail-ed1-x544.google.com with SMTP id h50so32001424ede.5 for ; Fri, 04 Jan 2019 06:43:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=qOpUHEeTTU1Uyuz7FYtdkr53lJpTCZn1klBESc1PP5w=; b=KeWwZHBL9qJ/TBHTH4vUSIrIst8RACcZHwYBfj7HpdHG9F2j3VkBKX8JG5pXOunZND D8vI40D23s4sMvpDD8UkjPDmBYvNyiLp344p6PkV6RE522GW4/HAvmdlj7iE7GHSkdKt /PHP7fpzadQAfGRZ2NCH2OuvkETEREGQKLk7Q= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=qOpUHEeTTU1Uyuz7FYtdkr53lJpTCZn1klBESc1PP5w=; b=dB/Txhg9MUUgNxExSsZ+aMd6oAtgQvz47v+MReUYC1uVd8eqj63VYdwimNXqd2tqnj mGFTxn52HB7t/CkK9owY+ErhTOkLjNFiVB/bXYsB+xf2wl7L93W0chWOXRMVec4KvV/2 ETrSYjV7HMIQdncbWXg2wbMmZ5GCpNM+eHK2F/pVeK3DuuwqpwwqgJOz95TP3AZ+EIhJ BYR1kTcu8kppoF8jUw+Rf0ybxIWzM6LhK9asMAcSBqqp2C3QVGtZ6n3dKd1AOyRdWfOt ueLchLcEP291gugIJ7dhdP0iExQUlkpdU0oYt7kvUNQLyiyp4efA+x4ZTUX84m1ZuinW hPXw== X-Gm-Message-State: AA+aEWasCTfWLH1MaCr31IO3B0h6PFUO41XLILQ167Sv0aoMlbFmuJj3 BHlwvSnNnvvVoPbzf3io9weJpyedmuLxJA== X-Google-Smtp-Source: AFSGD/Vp6TJXHz2yjseBzpXjLYbhpk5eJV+hAi8aES/q92Fn29QfYKnBiyEqBr0lpNZMjAvZ9qreVA== X-Received: by 2002:a17:906:340a:: with SMTP id c10-v6mr39580457ejb.130.1546613027187; Fri, 04 Jan 2019 06:43:47 -0800 (PST) Received: from dogfood.home ([2a01:cb1d:112:6f00:183a:9013:d5a3:37a8]) by smtp.gmail.com with ESMTPSA id q16sm21608226eds.60.2019.01.04.06.43.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 04 Jan 2019 06:43:46 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Fri, 4 Jan 2019 15:43:32 +0100 Message-Id: <20190104144336.8941-4-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190104144336.8941-1-ard.biesheuvel@linaro.org> References: <20190104144336.8941-1-ard.biesheuvel@linaro.org> Subject: [PATCH edk2-platforms 3/7] Silicon/SynQuacer/Fip006Dxe: implement standalone MM variant X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 04 Jan 2019 14:43:50 -0000 Implement a variant of the FIP006 NOR flash driver that can execute in standalone MM context. This is the foundation for hosting the EFI authenticated variable store in the secure world. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/Fip006StandaloneMm.inf | 71 ++++++++ Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlashSmm.c | 182 ++++++++++++++++++++ 2 files changed, 253 insertions(+) diff --git a/Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/Fip006StandaloneMm.inf b/Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/Fip006StandaloneMm.inf new file mode 100644 index 000000000000..2dcbfd7db892 --- /dev/null +++ b/Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/Fip006StandaloneMm.inf @@ -0,0 +1,71 @@ +## @file +# Socionext FIP006 High-Speed SPI Controller with NOR Flash Driver +# +# Copyright (c) 2017, Socionext Inc. All rights reserved.
+# Copyright (c) 2017-2018, Linaro, Ltd. All rights reserved.
+# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +## + + +[Defines] + INF_VERSION = 0x0001001A + BASE_NAME = Fip006Dxe + FILE_GUID = 1b041d85-9b44-442b-a583-5cf008ef9060 + MODULE_TYPE = MM_STANDALONE + VERSION_STRING = 0.1 + PI_SPECIFICATION_VERSION = 0x00010032 + ENTRY_POINT = NorFlashInitialise + +[Sources] + NorFlashSmm.c + NorFlash.c + NorFlash.h + NorFlashFvb.c + +[Packages] + ArmPlatformPkg/ArmPlatformPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/Fip006Dxe.dec + StandaloneMmPkg/StandaloneMmPkg.dec + +[LibraryClasses] + BaseLib + BaseMemoryLib + DebugLib + IoLib + MemoryAllocationLib + MmServicesTableLib + NorFlashInfoLib + NorFlashPlatformLib + StandaloneMmDriverEntryPoint + +[Guids] + gEfiAuthenticatedVariableGuid + gEfiSystemNvDataFvGuid + gEfiVariableGuid + +[Protocols] + gEfiSmmFirmwareVolumeBlockProtocolGuid + +[FixedPcd] + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize + gFip006DxeTokenSpaceGuid.PcdFip006DxeRegBaseAddress + gFip006DxeTokenSpaceGuid.PcdFip006DxeMemBaseAddress + +[Depex] + TRUE diff --git a/Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlashSmm.c b/Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlashSmm.c new file mode 100644 index 000000000000..bab3d9f4cd14 --- /dev/null +++ b/Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlashSmm.c @@ -0,0 +1,182 @@ +/** @file NorFlashSmm.c + + Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.
+ Copyright (c) 2017, Socionext Inc. All rights reserved.
+ Copyright (c) 2017, Linaro, Ltd. All rights reserved.
+ + This program and the accompanying materials are licensed and made available + under the terms and conditions of the BSD License which accompanies this + distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include + +#include + +#include "NorFlash.h" + +// +// Global variable declarations +// +STATIC NOR_FLASH_INSTANCE **mNorFlashInstances; +STATIC UINT32 mNorFlashDeviceCount; + +EFI_STATUS +EFIAPI +NorFlashFvbInitialize ( + IN NOR_FLASH_INSTANCE* Instance + ) +{ + EFI_STATUS Status; + UINT32 FvbNumLba; + UINTN BlockSize; + + DEBUG ((DEBUG_BLKIO,"NorFlashFvbInitialize\n")); + + BlockSize = Instance->BlockSize; + + // FirmwareVolumeHeader->FvLength is declared to have the Variable area + // AND the FTW working area AND the FTW Spare contiguous. + ASSERT (PcdGet32 (PcdFlashNvStorageVariableBase) + + PcdGet32 (PcdFlashNvStorageVariableSize) == + PcdGet32 (PcdFlashNvStorageFtwWorkingBase)); + ASSERT (PcdGet32 (PcdFlashNvStorageFtwWorkingBase) + + PcdGet32 (PcdFlashNvStorageFtwWorkingSize) == + PcdGet32 (PcdFlashNvStorageFtwSpareBase)); + + // Check if the size of the area is at least one block size + ASSERT ((PcdGet32 (PcdFlashNvStorageVariableSize) > 0) && + (PcdGet32 (PcdFlashNvStorageVariableSize) / BlockSize > 0)); + ASSERT ((PcdGet32 (PcdFlashNvStorageFtwWorkingSize) > 0) && + (PcdGet32 (PcdFlashNvStorageFtwWorkingSize) / BlockSize > 0)); + ASSERT ((PcdGet32 (PcdFlashNvStorageFtwSpareSize) > 0) && + (PcdGet32 (PcdFlashNvStorageFtwSpareSize) / BlockSize > 0)); + + // Ensure the Variable areas are aligned on block size boundaries + ASSERT ((PcdGet32 (PcdFlashNvStorageVariableBase) % BlockSize) == 0); + ASSERT ((PcdGet32 (PcdFlashNvStorageFtwWorkingBase) % BlockSize) == 0); + ASSERT ((PcdGet32 (PcdFlashNvStorageFtwSpareBase) % BlockSize) == 0); + + + Instance->Initialized = TRUE; + mFlashNvStorageVariableBase = FixedPcdGet32 (PcdFlashNvStorageVariableBase); + + // Set the index of the first LBA for the FVB + Instance->StartLba = (PcdGet32 (PcdFlashNvStorageVariableBase) - + Instance->RegionBaseAddress) / BlockSize; + + // Determine if there is a valid header at the beginning of the NorFlash + Status = ValidateFvHeader (Instance); + if (EFI_ERROR (Status)) { + // There is no valid header, so time to install one. + DEBUG ((DEBUG_INFO, "%a: The FVB Header is not valid.\n", __FUNCTION__)); + DEBUG ((DEBUG_INFO, "%a: Installing a correct one for this volume.\n", + __FUNCTION__)); + + // Erase all the NorFlash that is reserved for variable storage + FvbNumLba = (PcdGet32(PcdFlashNvStorageVariableSize) + + PcdGet32(PcdFlashNvStorageFtwWorkingSize) + + PcdGet32(PcdFlashNvStorageFtwSpareSize)) / + Instance->BlockSize; + + Status = FvbEraseBlocks (&Instance->FvbProtocol, (EFI_LBA)0, FvbNumLba, + EFI_LBA_LIST_TERMINATOR); + if (EFI_ERROR (Status)) { + return Status; + } + + // Install all appropriate headers + Status = InitializeFvAndVariableStoreHeaders (Instance); + if (EFI_ERROR (Status)) { + return Status; + } + } + return EFI_SUCCESS; +} + +EFI_STATUS +EFIAPI +NorFlashInitialise ( + IN EFI_HANDLE ImageHandle, + IN EFI_MM_SYSTEM_TABLE *MmSystemTable + ) +{ + EFI_STATUS Status; + UINT32 Index; + NOR_FLASH_DESCRIPTION* NorFlashDevices; + BOOLEAN ContainVariableStorage; + + Status = NorFlashPlatformInitialization (); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, + "NorFlashInitialise: Fail to initialize Nor Flash devices\n")); + return Status; + } + + // Initialize NOR flash instances + Status = NorFlashPlatformGetDevices (&NorFlashDevices, &mNorFlashDeviceCount); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR,"NorFlashInitialise: Fail to get Nor Flash devices\n")); + return Status; + } + + mNorFlashInstances = AllocatePool (sizeof(NOR_FLASH_INSTANCE*) * + mNorFlashDeviceCount); + + for (Index = 0; Index < mNorFlashDeviceCount; Index++) { + // Check if this NOR Flash device contain the variable storage region + ContainVariableStorage = + (NorFlashDevices[Index].RegionBaseAddress <= + PcdGet32 (PcdFlashNvStorageVariableBase)) && + (PcdGet32 (PcdFlashNvStorageVariableBase) + + PcdGet32 (PcdFlashNvStorageVariableSize) <= + NorFlashDevices[Index].RegionBaseAddress + NorFlashDevices[Index].Size); + + Status = NorFlashCreateInstance ( + PcdGet32 (PcdFip006DxeRegBaseAddress), + NorFlashDevices[Index].DeviceBaseAddress, + NorFlashDevices[Index].RegionBaseAddress, + NorFlashDevices[Index].Size, + Index, + NorFlashDevices[Index].BlockSize, + ContainVariableStorage, + &mNorFlashInstances[Index] + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, + "NorFlashInitialise: Fail to create instance for NorFlash[%d]\n", + Index)); + continue; + } + Status = gMmst->MmInstallProtocolInterface ( + &mNorFlashInstances[Index]->Handle, + &gEfiSmmFirmwareVolumeBlockProtocolGuid, + EFI_NATIVE_INTERFACE, + &mNorFlashInstances[Index]->FvbProtocol + ); + ASSERT_EFI_ERROR (Status); + } + + return Status; +} + +VOID +EFIAPI +NorFlashLock ( + NOR_FLASH_LOCK_CONTEXT *Context + ) +{ +} + +VOID +EFIAPI +NorFlashUnlock ( + NOR_FLASH_LOCK_CONTEXT *Context + ) +{ +} -- 2.17.1