Re: [platforms: PATCH 1/3] Marvell: Armada7k8k: Shift PEI stack base

[Leif Lindholm <leif.lindholm@linaro.org>]

On Mon, Jan 21, 2019 at 11:52:09AM +0100, Marcin Wojtas wrote:
> Recent changes in the ARM-TF configure its runtime serices region
> as protected, hence the hitherto PEI stack base address (0x41F0000)
> violated it.
> 
> In order to fix this, extend the region which is non-accessible
> by the OS to cover both the ARM-TF (0x4000000 - 0x4200000) and OPTEE
> (0x4400000 - 0x5400000) within a single area and set the PEI stack

What is the single area?

> base address between both images.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> ---
>  Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
> index eafcd6e..c8c597f 100644
> --- a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
> +++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
> @@ -376,12 +376,12 @@
>  
>    gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|36
>  
> -  gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x41F0000
> +  gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x43F0000
>    gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000
>  
>    # Secure region reservation
>    gMarvellTokenSpaceGuid.PcdSecureRegionBase|0x4000000
> -  gMarvellTokenSpaceGuid.PcdSecureRegionSize|0x0200000
> +  gMarvellTokenSpaceGuid.PcdSecureRegionSize|0x1400000
>  
>    # TRNG
>    gMarvellTokenSpaceGuid.PcdEip76TrngBaseAddress|0xF2760000
> -- 
> 2.7.4
>