From: Leif Lindholm <leif.lindholm@linaro.org>
To: Marcin Wojtas <mw@semihalf.com>
Cc: edk2-devel@lists.01.org, ard.biesheuvel@linaro.org,
nadavh@marvell.com, jsd@semihalf.com, jaz@semihalf.com,
kostap@marvell.com
Subject: Re: [platforms: PATCH v2 4/4] Marvell/Armada7k8k: Read DRAM settings from ARM-TF
Date: Tue, 22 Jan 2019 17:39:16 +0000 [thread overview]
Message-ID: <20190122173916.p27cy5d7q6z4et7g@bivouac.eciton.net> (raw)
In-Reply-To: <1548120742-11928-5-git-send-email-mw@semihalf.com>
On Tue, Jan 22, 2019 at 02:32:22AM +0100, Marcin Wojtas wrote:
> From: Grzegorz Jaszczyk <jaz@semihalf.com>
>
> The memory controller registers are marked as secure in the latest
> ARM-TF for Armada SoCs. It is available however get the DRAM
> information via SiP services in the EL3, so use it instead
> of accessing the registers directly.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
(With the required include path change based on feedback on other patch:)
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> ---
> Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf | 3 +
> Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLibMem.h | 25 --------
> Silicon/Marvell/Include/Library/MvSmc.h | 1 +
> Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLibMem.c | 60 ++++++--------------
> 4 files changed, 22 insertions(+), 67 deletions(-)
>
> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
> index e888566..0c7f320 100644
> --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
> @@ -41,12 +41,15 @@
> [Packages]
> ArmPkg/ArmPkg.dec
> ArmPlatformPkg/ArmPlatformPkg.dec
> + EmbeddedPkg/EmbeddedPkg.dec
> MdeModulePkg/MdeModulePkg.dec
> MdePkg/MdePkg.dec
> Silicon/Marvell/Marvell.dec
>
> [LibraryClasses]
> + ArmadaSoCDescLib
> ArmLib
> + ArmSmcLib
> DebugLib
> MemoryAllocationLib
> MppLib
> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLibMem.h b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLibMem.h
> index cc30e4a..8101cf3 100644
> --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLibMem.h
> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLibMem.h
> @@ -46,28 +46,3 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> (MmioRead32 (CCU_MC_RCR_REG) & REMAP_SIZE_MASK) + SIZE_1MB
> #define DRAM_REMAP_TARGET \
> (MmioRead32 (CCU_MC_RTBR_REG) << TARGET_BASE_OFFS)
> -
> -#define DRAM_CH0_MMAP_LOW_REG(cs) (0xf0020200 + (cs) * 0x8)
> -#define DRAM_CS_VALID_ENABLED_MASK 0x1
> -#define DRAM_AREA_LENGTH_OFFS 16
> -#define DRAM_AREA_LENGTH_MASK (0x1f << DRAM_AREA_LENGTH_OFFS)
> -#define DRAM_START_ADDRESS_L_OFFS 23
> -#define DRAM_START_ADDRESS_L_MASK (0x1ff << DRAM_START_ADDRESS_L_OFFS)
> -#define DRAM_CH0_MMAP_HIGH_REG(cs) (0xf0020204 + (cs) * 0x8)
> -#define DRAM_START_ADDR_HTOL_OFFS 32
> -
> -#define DRAM_MAX_CS_NUM 8
> -
> -#define DRAM_CS_ENABLED(Cs) \
> - (MmioRead32 (DRAM_CH0_MMAP_LOW_REG (Cs)) & DRAM_CS_VALID_ENABLED_MASK)
> -#define GET_DRAM_REGION_BASE(Cs) \
> - ((UINT64)MmioRead32 (DRAM_CH0_MMAP_HIGH_REG ((Cs))) << \
> - DRAM_START_ADDR_HTOL_OFFS) | \
> - (MmioRead32 (DRAM_CH0_MMAP_LOW_REG (Cs)) & DRAM_START_ADDRESS_L_MASK);
> -#define GET_DRAM_REGION_SIZE_CODE(Cs) \
> - (MmioRead32 (DRAM_CH0_MMAP_LOW_REG ((Cs))) & \
> - DRAM_AREA_LENGTH_MASK) >> DRAM_AREA_LENGTH_OFFS
> -#define DRAM_REGION_SIZE_EVEN(C) (((C) >= 7) && ((C) <= 26))
> -#define GET_DRAM_REGION_SIZE_EVEN(C) ((UINT64)1 << ((C) + 16))
> -#define DRAM_REGION_SIZE_ODD(C) ((C) <= 4)
> -#define GET_DRAM_REGION_SIZE_ODD(C) ((UINT64)0x18000000 << (C))
> diff --git a/Silicon/Marvell/Include/Library/MvSmc.h b/Silicon/Marvell/Include/Library/MvSmc.h
> index 2d1542a..0c90f11 100644
> --- a/Silicon/Marvell/Include/Library/MvSmc.h
> +++ b/Silicon/Marvell/Include/Library/MvSmc.h
> @@ -19,5 +19,6 @@
> #define MV_SMC_ID_COMPHY_POWER_ON 0x82000001
> #define MV_SMC_ID_COMPHY_POWER_OFF 0x82000002
> #define MV_SMC_ID_COMPHY_PLL_LOCK 0x82000003
> +#define MV_SMC_ID_DRAM_SIZE 0x82000010
>
> #endif //__MV_SMC_H__
> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLibMem.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLibMem.c
> index 2a4f5ad..8517deb 100644
> --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLibMem.c
> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLibMem.c
> @@ -32,12 +32,18 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>
> *******************************************************************************/
>
> -#include <Base.h>
> +#include <Uefi.h>
> +
> +#include <IndustryStandard/ArmStdSmc.h>
> +
> +#include <Library/ArmadaSoCDescLib.h>
> #include <Library/ArmPlatformLib.h>
> +#include <Library/ArmSmcLib.h>
> #include <Library/DebugLib.h>
> #include <Library/HobLib.h>
> #include <Library/IoLib.h>
> #include <Library/MemoryAllocationLib.h>
> +#include <Library/MvSmc.h>
>
> #include "Armada7k8kLibMem.h"
>
> @@ -57,49 +63,19 @@ GetDramSize (
> IN OUT UINT64 *MemSize
> )
> {
> - UINT64 BaseAddr;
> - UINT8 RegionCode;
> - UINT8 Cs;
> -
> - *MemSize = 0;
> -
> - for (Cs = 0; Cs < DRAM_MAX_CS_NUM; Cs++) {
> -
> - /* Exit loop on first disabled DRAM CS */
> - if (!DRAM_CS_ENABLED (Cs)) {
> - break;
> - }
> -
> - /*
> - * Sanity check for base address of next DRAM block.
> - * Only continuous space will be used.
> - */
> - BaseAddr = GET_DRAM_REGION_BASE (Cs);
> - if (BaseAddr != *MemSize) {
> - DEBUG ((DEBUG_ERROR,
> - "%a: DRAM blocks are not contiguous, limit size to 0x%llx\n",
> - __FUNCTION__,
> - *MemSize));
> - return EFI_SUCCESS;
> - }
> -
> - /* Decode area length for current CS from register value */
> - RegionCode = GET_DRAM_REGION_SIZE_CODE (Cs);
> -
> - if (DRAM_REGION_SIZE_EVEN (RegionCode)) {
> - *MemSize += GET_DRAM_REGION_SIZE_EVEN (RegionCode);
> - } else if (DRAM_REGION_SIZE_ODD (RegionCode)) {
> - *MemSize += GET_DRAM_REGION_SIZE_ODD (RegionCode);
> - } else {
> - DEBUG ((DEBUG_ERROR,
> - "%a: Invalid memory region code (0x%x) for CS#%d\n",
> - __FUNCTION__,
> - RegionCode,
> - Cs));
> - return EFI_INVALID_PARAMETER;
> - }
> + ARM_SMC_ARGS SmcRegs = {0};
> + EFI_STATUS Status;
> +
> + SmcRegs.Arg0 = MV_SMC_ID_DRAM_SIZE;
> + Status = ArmadaSoCAp8xxBaseGet (&SmcRegs.Arg1, 0);
> + if (EFI_ERROR (Status)) {
> + return Status;
> }
>
> + ArmCallSmc (&SmcRegs);
> +
> + *MemSize = SmcRegs.Arg0;
> +
> return EFI_SUCCESS;
> }
>
> --
> 2.7.4
>
prev parent reply other threads:[~2019-01-22 17:39 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-22 1:32 [platforms: PATCH v2 0/4] Armada7k8k memory handling update Marcin Wojtas
2019-01-22 1:32 ` [platforms: PATCH v2 1/4] Marvell/Armada7k8k: Shift PEI stack base Marcin Wojtas
2019-01-22 17:26 ` Leif Lindholm
2019-01-22 18:26 ` Marcin Wojtas
2019-01-22 19:06 ` Leif Lindholm
2019-01-22 19:27 ` Marcin Wojtas
2019-01-22 20:26 ` Leif Lindholm
2019-01-22 20:56 ` Marcin Wojtas
2019-01-22 21:09 ` Leif Lindholm
2019-01-23 8:28 ` Marcin Wojtas
2019-01-23 9:42 ` Leif Lindholm
2019-01-23 9:45 ` Marcin Wojtas
2019-01-22 1:32 ` [platforms: PATCH v2 2/4] Marvell/Library: Introduce common header for the SMC ID's Marcin Wojtas
2019-01-22 17:35 ` Leif Lindholm
2019-01-22 18:15 ` Marcin Wojtas
2019-01-22 1:32 ` [platforms: PATCH v2 3/4] Marvell/Library: ArmadaSoCDescLib: Add North Bridge description Marcin Wojtas
2019-01-22 17:38 ` Leif Lindholm
2019-01-22 1:32 ` [platforms: PATCH v2 4/4] Marvell/Armada7k8k: Read DRAM settings from ARM-TF Marcin Wojtas
2019-01-22 17:39 ` Leif Lindholm [this message]
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