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Date: Mon, 28 Jan 2019 13:46:18 +0000
From: Mark Rutland <mark.rutland@arm.com>
To: Tan Xiaojun <tanxiaojun@huawei.com>
Cc: Laszlo Ersek <lersek@redhat.com>,
 Ard Biesheuvel <ard.biesheuvel@linaro.org>,
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Subject: Re: [PATCH] ArmPkg: update InvalidateInstructionCacheRange to flush only to PoU
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On Mon, Jan 28, 2019 at 09:09:26PM +0800, Tan Xiaojun wrote:
> On 2019/1/28 19:54, Laszlo Ersek wrote:
> > On 01/28/19 11:46, Mark Rutland wrote:
> >> On Wed, Jan 23, 2019 at 10:54:56AM +0100, Laszlo Ersek wrote:
> >>> And even on the original (unspecified) hardware, the same binary works
> >>> frequently. My understanding is that there are five VMs executing reboot
> >>> loops in parallel, on the same host, and 4 out of 5 may hit the issue in
> >>> a reasonable time period (300 reboots or so).
> >>
> >> Interesting.
> >>
> >> Do you happen to know how many VMID bits the host has? If it has an 8-bit VMID,
> >> this could be indicative of some problem upon overflow.
> > 
> > I'll let Tan Xiaojun (CC'd) answer this questions.
> > 
> >> Can you point us at the host kernel?
> > 
> > In the report, Tan Xiaojun wrote "4.18.0-48.el8.aarch64"; I guess that
> > information is mostly useless in an upstream discussion. Unfortunately,
> > I couldn't reproduce the symptom at all (I know nothing about the
> > hardware in question), so I can't myself retest with an upstream host
> > kernel.
> 
> I don't understand, what do you want me to do? What is the specific problem?

Could you let us know which CPU/system you've seen this issue with?

... and what the value of ID_AA64MMFR1_EL1.VMIDBits is?

Thanks,
Mark.