From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::442; helo=mail-wr1-x442.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr1-x442.google.com (mail-wr1-x442.google.com [IPv6:2a00:1450:4864:20::442]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 7A71A211C2805 for ; Wed, 30 Jan 2019 08:47:42 -0800 (PST) Received: by mail-wr1-x442.google.com with SMTP id t6so159439wrr.12 for ; Wed, 30 Jan 2019 08:47:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=iOxm+XHdpcerdeYNcLfnq0m8+6HmLRY3Oh+C3bBG04c=; b=Shdh9/PQI9YGkKvmrhJN/9Pmyg3fyKqRoiAOqGMPoPru9TMZ4qVQa4CpaYtc9vUWTK TBbgK3q5DG72HAlrNtYf4glcRkZ3g8NraRNWgQD/BYHms4kj4UZttKE9g7yzEUXVtMuz mVHEenJ2t8FpVUV2/MRXfcUzoM9tiT6/czYNQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=iOxm+XHdpcerdeYNcLfnq0m8+6HmLRY3Oh+C3bBG04c=; b=IVjSL6QZyJ3oOsnDdKlD4nAjCY6LEDMNASOJFt/J54uHnICbEkS1SeRVDRkT30sMea P9c6IRYscq1FycFnqKHATiXAP7iH1L9fBwKhMqsCAQ1YWhEtvZe90upC1tnvy4PIkiFX G0d66gPSn+uvZSSHICmmUN9a5e1U8ycXZDcTKH06FhZDwggrjGq7XjVpxqxDN0Jp6BuI NJN2cRF8Q8KF5z0Sx/kiSsM7DjE2YvFTzmK3cxidK7mQSydAmgBFHQSBC/xoC+yCuQJQ 1GN9Ii1S/4SjLiXAt+qSLPdqKoyLVCxHpaWQYLQKU0i/fev7FCxWgAyS/rW7ZMGtvttW 5yeA== X-Gm-Message-State: AJcUukcX5R38cx2YiFbgMUINKBatLGTVv9WKzQB4IB1bR9GHRRFi+aO6 E6gWTtPKdwTcxt0NcW/8KnUBVw== X-Google-Smtp-Source: ALg8bN4khNUNBZVPEglCv94pqQv7noLRcBi/28e/yyDbz4ELKvuT3UgaQjHmOldElH2TfMZWXQpdhg== X-Received: by 2002:a5d:6244:: with SMTP id m4mr30187867wrv.314.1548866860547; Wed, 30 Jan 2019 08:47:40 -0800 (PST) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id n6sm2085666wmk.9.2019.01.30.08.47.39 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 30 Jan 2019 08:47:39 -0800 (PST) Date: Wed, 30 Jan 2019 16:47:37 +0000 From: Leif Lindholm To: Marcin Wojtas Cc: edk2-devel@lists.01.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, jsd@semihalf.com, jaz@semihalf.com, kostap@marvell.com Message-ID: <20190130164737.glko5nprvhfcy7ap@bivouac.eciton.net> References: <1548668715-15042-1-git-send-email-mw@semihalf.com> MIME-Version: 1.0 In-Reply-To: <1548668715-15042-1-git-send-email-mw@semihalf.com> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [platforms: PATCH v3 0/5] Armada7k8k memory handling update X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 30 Jan 2019 16:47:42 -0000 X-List-Received-Date: Wed, 30 Jan 2019 16:47:42 -0000 X-List-Received-Date: Wed, 30 Jan 2019 16:47:42 -0000 X-List-Received-Date: Wed, 30 Jan 2019 16:47:42 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Thanks for the rework. (We should probably move that broken-out function to ArmPkg at some point.) For the series: Reviewed-by: Leif Lindholm Pushed as b0bb325f20..0a7d8e7d93. On Mon, Jan 28, 2019 at 10:45:10AM +0100, Marcin Wojtas wrote: > Hi, > > The third version of the patchset moves the new common > header for Marvell SMC ID's to the IndustryStandard directory. > What is more important, now 3 regions (described by new PCDs) > are reserved separately. For that purpose a preparation > patch was added, which extract existing reservation code > into a new subroutine. More details can be found in > the changelog below and the commit messages. > > Patches are available in the github: > https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/dram-upstream-r20190128 > > I'm looking forward to the comments and remarks. > > Best regards, > Marcin > > Changelog: > v2 -> v3 > * 1/5 > - New patch - extract memory reservation to a separate routine > > * 2/2 > - Add new PCDs and reserve 3 regions (ARM-TF, PEI stack, OP-TEE) > separately > - Update commit message accordingly > > * 3/5 > - Move MvSmc.h to Include/IndustryStandard > > * 4,5/5 > - Add Leif's RB > > v1 -> v2: > * 1/4 > - Improve commit log - mention single area size and new PEI stack base > > * 2/4 (new patch) > - Add common header for Marvell SMC ID's > > * 3/4 > - Add function description comment > - Define and use ARMADA7K8K_AP806_INDEX > - Change function argument to EFI_PHYSICAL_ADDRESS > > * 4/4 > - Move new SMC ID to MvSmc.h > - Include ArmadaSoCDescLib.h directly (instead indirectly via BoardDesc.h) > - Remove ARMADA7K8K_AP806_INDEX macro > > Grzegorz Jaszczyk (2): > Marvell/Library: ArmadaSoCDescLib: Add North Bridge description > Marvell/Armada7k8k: Read DRAM settings from ARM-TF > > Marcin Wojtas (3): > Marvell/Armada7k8k: Refactor reserving memory regions > Marvell/Armada7k8k: Shift PEI stack base and extend memory reservation > Marvell/Library: Introduce common header for the SMC ID's > > Silicon/Marvell/Marvell.dec | 8 +- > Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 16 ++- > Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf | 3 + > Silicon/Marvell/Armada7k8k/Library/Armada7k8kMemoryInitPeiLib/Armada7k8kMemoryInitPeiLib.inf | 8 +- > Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLibMem.h | 25 ----- > Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h | 6 ++ > Silicon/Marvell/Include/IndustryStandard/MvSmc.h | 24 +++++ > Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 28 +++++ > Silicon/Marvell/Library/ComPhyLib/ComPhySipSvc.h | 8 +- > Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLibMem.c | 60 ++++------- > Silicon/Marvell/Armada7k8k/Library/Armada7k8kMemoryInitPeiLib/Armada7k8kMemoryInitPeiLib.c | 107 +++++++++++++------- > Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 34 +++++++ > Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c | 14 +-- > 13 files changed, 220 insertions(+), 121 deletions(-) > create mode 100644 Silicon/Marvell/Include/IndustryStandard/MvSmc.h > > -- > 2.7.4 >