From: Ming Huang <ming.huang@linaro.org>
To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org,
edk2-devel@lists.01.org, graeme.gregory@linaro.org
Cc: ard.biesheuvel@linaro.org, michael.d.kinney@intel.com,
lersek@redhat.com, wanghuiqiang@huawei.com,
huangming23@huawei.com, zhangjinsong2@huawei.com,
huangdaode@hisilicon.com, john.garry@huawei.com,
xinliang.liu@linaro.org, zhangfeng56@huawei.com,
Ming Huang <ming.huang@linaro.org>
Subject: [PATCH edk2-platforms v1 09/16] Hisilicon/D06: Add PCI_OSC_SUPPORT
Date: Fri, 1 Feb 2019 21:34:29 +0800 [thread overview]
Message-ID: <20190201133436.10500-10-ming.huang@linaro.org> (raw)
In-Reply-To: <20190201133436.10500-1-ming.huang@linaro.org>
Add PCI_OSC_SUPPORT for remaining host bridges to remove fail
output in kernel:
[ 103.478893] acpi PNP0A08:01: _OSC failed (AE_NOT_FOUND);
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <ming.huang@linaro.org>
---
Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 64 ++++++++++++++++++++
1 file changed, 64 insertions(+)
diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
index 4d9d9d95be68..86d8728b82f2 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
+++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
@@ -17,6 +17,50 @@
**/
//#include "ArmPlatform.h"
+
+/*
+ See ACPI 6.1 Spec, 6.2.11, PCI Firmware Spec 3.0, 4.5
+*/
+#define PCI_OSC_SUPPORT() \
+ Name(SUPP, Zero) /* PCI _OSC Support Field value */ \
+ Name(CTRL, Zero) /* PCI _OSC Control Field value */ \
+ Method(_OSC,4) { \
+ If(LEqual(Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) { \
+ /* Create DWord-adressable fields from the Capabilities Buffer */ \
+ CreateDWordField(Arg3,0,CDW1) \
+ CreateDWordField(Arg3,4,CDW2) \
+ CreateDWordField(Arg3,8,CDW3) \
+ /* Save Capabilities DWord2 & 3 */ \
+ Store(CDW2,SUPP) \
+ Store(CDW3,CTRL) \
+ /* Only allow native hot plug control if OS supports: */ \
+ /* ASPM */ \
+ /* Clock PM */ \
+ /* MSI/MSI-X */ \
+ If(LNotEqual(And(SUPP, 0x16), 0x16)) { \
+ And(CTRL,0x1E,CTRL) \
+ }\
+ \
+ /* Do not allow native PME, AER */ \
+ /* Never allow SHPC (no SHPC controller in this system)*/ \
+ And(CTRL,0x10,CTRL) \
+ If(LNotEqual(Arg1,One)) { /* Unknown revision */ \
+ Or(CDW1,0x08,CDW1) \
+ } \
+ \
+ If(LNotEqual(CDW3,CTRL)) { /* Capabilities bits were masked */ \
+ Or(CDW1,0x10,CDW1) \
+ } \
+ \
+ /* Update DWORD3 in the buffer */ \
+ Store(CTRL,CDW3) \
+ Return(Arg3) \
+ } Else { \
+ Or(CDW1,4,CDW1) /* Unrecognized UUID */ \
+ Return(Arg3) \
+ } \
+ } // End _OSC
+
Scope(_SB)
{
Device (PCI0)
@@ -270,6 +314,8 @@ Device (PCI1)
Return (RBUF)
} // Method(_CRS), this method return RBUF!
+ PCI_OSC_SUPPORT ()
+
Method (_STA, 0x0, NotSerialized)
{
Return (0xf)
@@ -333,6 +379,8 @@ Device (PCI2)
Return (RBUF)
} // Method(_CRS), this method return RBUF!
+ PCI_OSC_SUPPORT ()
+
Method (_STA, 0x0, NotSerialized)
{
Return (0xf)
@@ -382,6 +430,8 @@ Device (PCI3)
Return (RBUF)
} // Method(_CRS), this method return RBUF!
+ PCI_OSC_SUPPORT ()
+
Method (_STA, 0x0, NotSerialized)
{
Return (0xf)
@@ -431,6 +481,8 @@ Device (PCI4)
Return (RBUF)
} // Method(_CRS), this method return RBUF!
+ PCI_OSC_SUPPORT ()
+
Method (_STA, 0x0, NotSerialized)
{
Return (0x0F)
@@ -505,6 +557,8 @@ Device (PCI5)
Return (RBUF)
} // Method(_CRS), this method return RBUF!
+ PCI_OSC_SUPPORT ()
+
Method (_STA, 0x0, NotSerialized)
{
Return (0xf)
@@ -1002,6 +1056,8 @@ Device (PCI7)
Return (RBUF)
} // Method(_CRS), this method return RBUF!
+ PCI_OSC_SUPPORT ()
+
Method (_STA, 0x0, NotSerialized)
{
Return (0xf)
@@ -1066,6 +1122,8 @@ Device (PCI8)
Return (RBUF)
} // Method(_CRS), this method return RBUF!
+ PCI_OSC_SUPPORT ()
+
Method (_STA, 0x0, NotSerialized)
{
Return (0xf)
@@ -1115,6 +1173,8 @@ Device (PCI9)
Return (RBUF)
} // Method(_CRS), this method return RBUF!
+ PCI_OSC_SUPPORT ()
+
Method (_STA, 0x0, NotSerialized)
{
Return (0xf)
@@ -1164,6 +1224,8 @@ Device (PCIA)
Return (RBUF)
} // Method(_CRS), this method return RBUF!
+ PCI_OSC_SUPPORT ()
+
Method (_STA, 0x0, NotSerialized)
{
Return (0x0F)
@@ -1238,6 +1300,8 @@ Device (PCIB)
Return (RBUF)
} // Method(_CRS), this method return RBUF!
+ PCI_OSC_SUPPORT ()
+
Method (_STA, 0x0, NotSerialized)
{
Return (0xf)
--
2.9.5
next prev parent reply other threads:[~2019-02-01 13:35 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-01 13:34 [PATCH edk2-platforms v1 00/16] Fix issues and improve D0x Ming Huang
2019-02-01 13:34 ` [PATCH edk2-platforms v1 01/16] Hisilicon/D0x: Remove SerdesLib Ming Huang
2019-02-11 15:05 ` Leif Lindholm
2019-02-13 6:36 ` Ming Huang
2019-02-13 9:42 ` Leif Lindholm
2019-02-13 11:39 ` Ming Huang
2019-02-14 10:51 ` Ming Huang
2019-02-01 13:34 ` [PATCH edk2-platforms v1 02/16] Hisilicon/D0x: Add DriverHealthManagerDxe Ming Huang
2019-02-11 15:20 ` Leif Lindholm
2019-02-01 13:34 ` [PATCH edk2-platforms v1 03/16] Hisilicon/D06: Optimize SAS driver for reducing boot time Ming Huang
2019-02-12 15:12 ` Leif Lindholm
2019-02-13 6:01 ` Ming Huang
2019-02-01 13:34 ` [PATCH edk2-platforms v1 04/16] Hisilicon/D06: Fix access variable fail issue Ming Huang
2019-02-12 15:17 ` Leif Lindholm
2019-02-13 2:21 ` Ming Huang
2019-02-01 13:34 ` [PATCH edk2-platforms v1 05/16] Hisilicon/D06: Add more PCIe port INT-x support Ming Huang
2019-02-11 17:05 ` Leif Lindholm
2019-02-12 12:27 ` Ming Huang
2019-02-01 13:34 ` [PATCH edk2-platforms v1 06/16] Hisilicon/D06: Add OemGetCpuFreq to encapsulate difference Ming Huang
2019-02-11 17:15 ` Leif Lindholm
2019-02-13 2:29 ` Ming Huang
2019-02-01 13:34 ` [PATCH edk2-platforms v1 07/16] Hisilicon/D0x: Rename StartupAp() function Ming Huang
2019-02-11 18:04 ` Leif Lindholm
2019-02-01 13:34 ` [PATCH edk2-platforms v1 08/16] Hisilicon/D06: Change HCCS speed from 30G to 26G Ming Huang
2019-02-11 18:36 ` Leif Lindholm
2019-02-12 14:45 ` Ming Huang
2019-02-12 14:59 ` Leif Lindholm
2019-02-01 13:34 ` Ming Huang [this message]
2019-02-11 18:51 ` [PATCH edk2-platforms v1 09/16] Hisilicon/D06: Add PCI_OSC_SUPPORT Leif Lindholm
2019-02-13 2:59 ` Ming Huang
2019-02-13 9:08 ` Leif Lindholm
2019-02-01 13:34 ` [PATCH edk2-platforms v1 10/16] Hisilicon/D06: Modify for M7 self-Adapte support Ming Huang
2019-02-11 19:28 ` Leif Lindholm
2019-02-12 15:14 ` Ming Huang
2019-02-12 15:46 ` Leif Lindholm
2019-02-13 4:38 ` Ming Huang
2019-02-01 13:34 ` [PATCH edk2-platforms v1 11/16] Hisilicon/D06: Add Setup Item "Support DPC" Ming Huang
2019-02-11 19:46 ` Leif Lindholm
2019-02-12 15:22 ` Ming Huang
2019-02-12 15:49 ` Leif Lindholm
2019-02-01 13:34 ` [PATCH edk2-platforms v1 12/16] Hisilicon/D06: Use new flash layout Ming Huang
2019-02-11 14:54 ` Leif Lindholm
2019-02-13 4:43 ` Ming Huang
2019-02-01 13:34 ` [PATCH edk2-platforms v1 13/16] Hisilicon/D06: Remove SECURE_BOOT_ENABLE definition Ming Huang
2019-02-11 19:47 ` Leif Lindholm
2019-02-01 13:34 ` [PATCH edk2-platforms v1 14/16] Hisilicon/D0x: Remove SP805 watchdog pcd Ming Huang
2019-02-11 19:48 ` Leif Lindholm
2019-02-15 14:18 ` [PATCH edk2-platforms v1 00/16] Fix issues and improve D0x Ming Huang
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