From: Leif Lindholm <leif.lindholm@linaro.org>
To: Ming Huang <ming.huang@linaro.org>
Cc: linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org,
graeme.gregory@linaro.org, ard.biesheuvel@linaro.org,
michael.d.kinney@intel.com, lersek@redhat.com,
wanghuiqiang@huawei.com, huangming23@huawei.com,
zhangjinsong2@huawei.com, huangdaode@hisilicon.com,
john.garry@huawei.com, zhangfeng56@huawei.com
Subject: Re: [PATCH edk2-platforms v1 05/16] Hisilicon/D06: Add more PCIe port INT-x support
Date: Mon, 11 Feb 2019 17:05:14 +0000 [thread overview]
Message-ID: <20190211170514.a6ixqcm4oz3i3kga@bivouac.eciton.net> (raw)
In-Reply-To: <20190201133436.10500-6-ming.huang@linaro.org>
On Fri, Feb 01, 2019 at 09:34:25PM +0800, Ming Huang wrote:
> From: Jason Zhang <zhangjinsong2@huawei.com>
>
> Since NVMe riser width is 6*X4, need add the related
> port's INT-x support to match OS driver.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <ming.huang@linaro.org>
> ---
> Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 65 +++++++++++++++-----
> 1 file changed, 50 insertions(+), 15 deletions(-)
>
> diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
> index 27fde2e09bfe..4d9d9d95be68 100644
> --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
> +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
> @@ -41,11 +41,21 @@ Scope(_SB)
> // adding RPx INTx configure deponds on hardware board topology,
> // if UEFI enables RPx, RPy, RPz... related INTx configure
> // should be added
> + Package () {0x2FFFF,0,0,640}, // INT_A
> + Package () {0x2FFFF,1,0,641}, // INT_B
> + Package () {0x2FFFF,2,0,642}, // INT_C
> + Package () {0x2FFFF,3,0,643}, // INT_D
> +
> Package () {0x4FFFF,0,0,640}, // INT_A
> Package () {0x4FFFF,1,0,641}, // INT_B
> Package () {0x4FFFF,2,0,642}, // INT_C
> Package () {0x4FFFF,3,0,643}, // INT_D
>
> + Package () {0x6FFFF,0,0,640}, // INT_A
> + Package () {0x6FFFF,1,0,641}, // INT_B
> + Package () {0x6FFFF,2,0,642}, // INT_C
> + Package () {0x6FFFF,3,0,643}, // INT_D
> +
> Package () {0x8FFFF,0,0,640}, // INT_A
> Package () {0x8FFFF,1,0,641}, // INT_B
> Package () {0x8FFFF,2,0,642}, // INT_C
> @@ -56,6 +66,11 @@ Scope(_SB)
> Package () {0xCFFFF,2,0,642}, // INT_C
> Package () {0xCFFFF,3,0,643}, // INT_D
>
> + Package () {0xEFFFF,0,0,640}, // INT_A
> + Package () {0xEFFFF,1,0,641}, // INT_B
> + Package () {0xEFFFF,2,0,642}, // INT_C
> + Package () {0xEFFFF,3,0,643}, // INT_D
> +
> Package () {0x10FFFF,0,0,640}, // INT_A
> Package () {0x10FFFF,1,0,641}, // INT_B
> Package () {0x10FFFF,2,0,642}, // INT_C
> @@ -759,26 +774,46 @@ Device (PCI6)
> // adding RPx INTx configure deponds on hardware board topology,
> // if UEFI enables RPx, RPy, RPz... related INTx configure
> // should be added
> - Package () {0x04FFFF,0,0,640}, // INT_A
> - Package () {0x04FFFF,1,0,641}, // INT_B
> - Package () {0x04FFFF,2,0,642}, // INT_C
> - Package () {0x04FFFF,3,0,643}, // INT_D
> -
> - Package () {0x08FFFF,0,0,640}, // INT_A
> - Package () {0x08FFFF,1,0,641}, // INT_B
> - Package () {0x08FFFF,2,0,642}, // INT_C
> - Package () {0x08FFFF,3,0,643}, // INT_D
> -
> - Package () {0x0CFFFF,0,0,640}, // INT_A
> - Package () {0x0CFFFF,1,0,641}, // INT_B
> - Package () {0x0CFFFF,2,0,642}, // INT_C
> - Package () {0x0CFFFF,3,0,643}, // INT_D
Please don't include the non-functional change of dropping the leading
0 (0x0 -> 0x) here together with the functional change of adding new
entries. Please submit as a separate patch.
/
Leif
> + Package () {0x2FFFF,0,0,640}, // INT_A
> + Package () {0x2FFFF,1,0,641}, // INT_B
> + Package () {0x2FFFF,2,0,642}, // INT_C
> + Package () {0x2FFFF,3,0,643}, // INT_D
> +
> + Package () {0x4FFFF,0,0,640}, // INT_A
> + Package () {0x4FFFF,1,0,641}, // INT_B
> + Package () {0x4FFFF,2,0,642}, // INT_C
> + Package () {0x4FFFF,3,0,643}, // INT_D
> +
> + Package () {0x6FFFF,0,0,640}, // INT_A
> + Package () {0x6FFFF,1,0,641}, // INT_B
> + Package () {0x6FFFF,2,0,642}, // INT_C
> + Package () {0x6FFFF,3,0,643}, // INT_D
> +
> + Package () {0x8FFFF,0,0,640}, // INT_A
> + Package () {0x8FFFF,1,0,641}, // INT_B
> + Package () {0x8FFFF,2,0,642}, // INT_C
> + Package () {0x8FFFF,3,0,643}, // INT_D
> +
> + Package () {0xCFFFF,0,0,640}, // INT_A
> + Package () {0xCFFFF,1,0,641}, // INT_B
> + Package () {0xCFFFF,2,0,642}, // INT_C
> + Package () {0xCFFFF,3,0,643}, // INT_D
> +
> + Package () {0xEFFFF,0,0,640}, // INT_A
> + Package () {0xEFFFF,1,0,641}, // INT_B
> + Package () {0xEFFFF,2,0,642}, // INT_C
> + Package () {0xEFFFF,3,0,643}, // INT_D
>
> Package () {0x10FFFF,0,0,640}, // INT_A
> Package () {0x10FFFF,1,0,641}, // INT_B
> Package () {0x10FFFF,2,0,642}, // INT_C
> Package () {0x10FFFF,3,0,643}, // INT_D
> - })
> +
> + Package () {0x12FFFF,0,0,640}, // INT_A
> + Package () {0x12FFFF,1,0,641}, // INT_B
> + Package () {0x12FFFF,2,0,642}, // INT_C
> + Package () {0x12FFFF,3,0,643}, // INT_D
> + })
>
> Method (_CRS, 0, Serialized) { // Root complex resources, _CRS: current resource setting
> Name (RBUF, ResourceTemplate () { // Name: 19.6.87, ResourceTemplate: 19.6.111,
> --
> 2.9.5
>
next prev parent reply other threads:[~2019-02-11 17:05 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-01 13:34 [PATCH edk2-platforms v1 00/16] Fix issues and improve D0x Ming Huang
2019-02-01 13:34 ` [PATCH edk2-platforms v1 01/16] Hisilicon/D0x: Remove SerdesLib Ming Huang
2019-02-11 15:05 ` Leif Lindholm
2019-02-13 6:36 ` Ming Huang
2019-02-13 9:42 ` Leif Lindholm
2019-02-13 11:39 ` Ming Huang
2019-02-14 10:51 ` Ming Huang
2019-02-01 13:34 ` [PATCH edk2-platforms v1 02/16] Hisilicon/D0x: Add DriverHealthManagerDxe Ming Huang
2019-02-11 15:20 ` Leif Lindholm
2019-02-01 13:34 ` [PATCH edk2-platforms v1 03/16] Hisilicon/D06: Optimize SAS driver for reducing boot time Ming Huang
2019-02-12 15:12 ` Leif Lindholm
2019-02-13 6:01 ` Ming Huang
2019-02-01 13:34 ` [PATCH edk2-platforms v1 04/16] Hisilicon/D06: Fix access variable fail issue Ming Huang
2019-02-12 15:17 ` Leif Lindholm
2019-02-13 2:21 ` Ming Huang
2019-02-01 13:34 ` [PATCH edk2-platforms v1 05/16] Hisilicon/D06: Add more PCIe port INT-x support Ming Huang
2019-02-11 17:05 ` Leif Lindholm [this message]
2019-02-12 12:27 ` Ming Huang
2019-02-01 13:34 ` [PATCH edk2-platforms v1 06/16] Hisilicon/D06: Add OemGetCpuFreq to encapsulate difference Ming Huang
2019-02-11 17:15 ` Leif Lindholm
2019-02-13 2:29 ` Ming Huang
2019-02-01 13:34 ` [PATCH edk2-platforms v1 07/16] Hisilicon/D0x: Rename StartupAp() function Ming Huang
2019-02-11 18:04 ` Leif Lindholm
2019-02-01 13:34 ` [PATCH edk2-platforms v1 08/16] Hisilicon/D06: Change HCCS speed from 30G to 26G Ming Huang
2019-02-11 18:36 ` Leif Lindholm
2019-02-12 14:45 ` Ming Huang
2019-02-12 14:59 ` Leif Lindholm
2019-02-01 13:34 ` [PATCH edk2-platforms v1 09/16] Hisilicon/D06: Add PCI_OSC_SUPPORT Ming Huang
2019-02-11 18:51 ` Leif Lindholm
2019-02-13 2:59 ` Ming Huang
2019-02-13 9:08 ` Leif Lindholm
2019-02-01 13:34 ` [PATCH edk2-platforms v1 10/16] Hisilicon/D06: Modify for M7 self-Adapte support Ming Huang
2019-02-11 19:28 ` Leif Lindholm
2019-02-12 15:14 ` Ming Huang
2019-02-12 15:46 ` Leif Lindholm
2019-02-13 4:38 ` Ming Huang
2019-02-01 13:34 ` [PATCH edk2-platforms v1 11/16] Hisilicon/D06: Add Setup Item "Support DPC" Ming Huang
2019-02-11 19:46 ` Leif Lindholm
2019-02-12 15:22 ` Ming Huang
2019-02-12 15:49 ` Leif Lindholm
2019-02-01 13:34 ` [PATCH edk2-platforms v1 12/16] Hisilicon/D06: Use new flash layout Ming Huang
2019-02-11 14:54 ` Leif Lindholm
2019-02-13 4:43 ` Ming Huang
2019-02-01 13:34 ` [PATCH edk2-platforms v1 13/16] Hisilicon/D06: Remove SECURE_BOOT_ENABLE definition Ming Huang
2019-02-11 19:47 ` Leif Lindholm
2019-02-01 13:34 ` [PATCH edk2-platforms v1 14/16] Hisilicon/D0x: Remove SP805 watchdog pcd Ming Huang
2019-02-11 19:48 ` Leif Lindholm
2019-02-15 14:18 ` [PATCH edk2-platforms v1 00/16] Fix issues and improve D0x Ming Huang
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