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[2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id p6sm7889372wrx.50.2019.02.11.11.48.11 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 11 Feb 2019 11:48:11 -0800 (PST) Date: Mon, 11 Feb 2019 19:48:09 +0000 From: Leif Lindholm To: Ming Huang Cc: linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org, ard.biesheuvel@linaro.org, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, john.garry@huawei.com, xinliang.liu@linaro.org, zhangfeng56@huawei.com Message-ID: <20190211194809.6pmfhb6mrci2nmty@bivouac.eciton.net> References: <20190201133436.10500-1-ming.huang@linaro.org> <20190201133436.10500-15-ming.huang@linaro.org> MIME-Version: 1.0 In-Reply-To: <20190201133436.10500-15-ming.huang@linaro.org> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH edk2-platforms v1 14/16] Hisilicon/D0x: Remove SP805 watchdog pcd X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 11 Feb 2019 19:48:14 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Fri, Feb 01, 2019 at 09:34:34PM +0800, Ming Huang wrote: > SP805 watchdog is no used for D0x, so remove it. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ming Huang Reviewed-by: Leif Lindholm > --- > Platform/Hisilicon/D03/D03.dsc | 3 --- > Platform/Hisilicon/D05/D05.dsc | 3 --- > Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf | 1 - > 3 files changed, 7 deletions(-) > > diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc > index fe443dd929ad..35b54f8c83be 100644 > --- a/Platform/Hisilicon/D03/D03.dsc > +++ b/Platform/Hisilicon/D03/D03.dsc > @@ -149,9 +149,6 @@ [PcdsFixedAtBuild.common] > > gHisiTokenSpaceGuid.PcdPcieRootBridgeMask|0x7 # bit0:HB0RB0,bit1:HB0RB1,bit2:HB0RB2,bit3:HB0RB3,bit4:HB1RB0,bit5:HB1RB1,bit6:HB1RB2,bit7:HB1RB3 > > - ## SP805 Watchdog - Motherboard Watchdog > - gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x601e0000 > - > ## Serial Terminal > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x2F8 > gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200 > diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc > index 0c4f21fbe056..49bd5b37ea34 100644 > --- a/Platform/Hisilicon/D05/D05.dsc > +++ b/Platform/Hisilicon/D05/D05.dsc > @@ -163,9 +163,6 @@ [PcdsFixedAtBuild.common] > gHisiTokenSpaceGuid.PcdPcieRootBridgeMask2P|0x34F4 # bit0:HB0RB0,bit1:HB0RB1,bit2:HB0RB2,bit3:HB0RB3,bit4:HB0RB4,bit5:HB0RB5,bit6:HB0RB6,bit7:HB0RB7 > # bit8:HB1RB0,bit9:HB1RB1,bit10:HB1RB2,bit11:HB1RB3,bit12:HB1RB4,bit13:HB1RB5,bit14:HB1RB6,bit14:HB1RB15 > > - ## SP805 Watchdog - Motherboard Watchdog > - gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x601e0000 > - > ## Serial Terminal > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x602B0000 > gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200 > diff --git a/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf b/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf > index 3563df6e10d1..4ce5f5fea1f3 100644 > --- a/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf > +++ b/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf > @@ -61,5 +61,4 @@ [FixedPcd] > gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase > gHisiTokenSpaceGuid.PcdSysControlBaseAddress > gHisiTokenSpaceGuid.PcdPeriSubctrlAddress > - gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase > > -- > 2.9.5 >