* [PATCH v2 0/3] MdeModulePkg/PciBus: Fix a bug PPB MEM32 BAR isn't restored sometimes
@ 2019-02-12 9:47 Ray Ni
2019-02-12 9:47 ` [PATCH v2 1/3] MdeModulePkg/PciBus: Change PCI_IO_DEVICE.RomSize to UINT32 type Ray Ni
` (3 more replies)
0 siblings, 4 replies; 5+ messages in thread
From: Ray Ni @ 2019-02-12 9:47 UTC (permalink / raw)
To: edk2-devel
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1505
v2: fixed all typos in PciBus driver.
changed RomSize to UINT32 and added type cast to PPB MEM32 BAR
Base/Length to avoid using RShiftU64().
Ray Ni (3):
MdeModulePkg/PciBus: Change PCI_IO_DEVICE.RomSize to UINT32 type
MdeModulePkg/PciBus: Correct typos
MdeModulePkg/PciBus: Fix a bug PPB MEM32 BAR isn't restored sometimes
MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h | 4 +-
MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c | 14 +--
MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.h | 16 +--
.../Bus/Pci/PciBusDxe/PciDeviceSupport.c | 20 ++--
.../Bus/Pci/PciBusDxe/PciDeviceSupport.h | 14 +--
.../Bus/Pci/PciBusDxe/PciDriverOverride.c | 4 +-
.../Bus/Pci/PciBusDxe/PciDriverOverride.h | 4 +-
.../Bus/Pci/PciBusDxe/PciEnumerator.c | 8 +-
.../Bus/Pci/PciBusDxe/PciEnumerator.h | 8 +-
.../Bus/Pci/PciBusDxe/PciEnumeratorSupport.c | 42 +++----
.../Bus/Pci/PciBusDxe/PciEnumeratorSupport.h | 16 +--
.../Bus/Pci/PciBusDxe/PciHotPlugSupport.c | 16 +--
.../Bus/Pci/PciBusDxe/PciHotPlugSupport.h | 18 +--
MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c | 16 +--
MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h | 4 +-
MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 4 +-
.../Bus/Pci/PciBusDxe/PciOptionRomSupport.c | 6 +-
.../Bus/Pci/PciBusDxe/PciOptionRomSupport.h | 4 +-
.../Bus/Pci/PciBusDxe/PciPowerManagement.c | 4 +-
.../Bus/Pci/PciBusDxe/PciPowerManagement.h | 4 +-
.../Bus/Pci/PciBusDxe/PciResourceSupport.c | 113 +++++++++---------
.../Bus/Pci/PciBusDxe/PciResourceSupport.h | 41 ++++---
MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.h | 7 +-
23 files changed, 190 insertions(+), 197 deletions(-)
--
2.20.1.windows.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v2 1/3] MdeModulePkg/PciBus: Change PCI_IO_DEVICE.RomSize to UINT32 type
2019-02-12 9:47 [PATCH v2 0/3] MdeModulePkg/PciBus: Fix a bug PPB MEM32 BAR isn't restored sometimes Ray Ni
@ 2019-02-12 9:47 ` Ray Ni
2019-02-12 9:47 ` [PATCH v2 2/3] MdeModulePkg/PciBus: Correct typos Ray Ni
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Ray Ni @ 2019-02-12 9:47 UTC (permalink / raw)
To: edk2-devel; +Cc: Hao Wu
Per PCI Spec, the option ROM BAR is 32bit so the maximum option ROM
size can be hold by UINT32 type.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
---
MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h | 4 ++--
MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c | 6 +++---
MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c | 8 ++++----
MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h | 4 ++--
MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 4 ++--
5 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
index 6938802857..18d76ea965 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
@@ -1,7 +1,7 @@
/** @file
Header files and data structures needed by PCI Bus module.
-Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -237,7 +237,7 @@ struct _PCI_IO_DEVICE {
//
// The OptionRom Size
//
- UINT64 RomSize;
+ UINT32 RomSize;
//
// TRUE if all OpROM (in device or in platform specific position) have been processed
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
index ab791541c3..7fb8e596f5 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
@@ -1,7 +1,7 @@
/** @file
Supporting functions implementaion for PCI devices management.
-Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
(C) Copyright 2018 Hewlett Packard Enterprise Development LP<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -259,7 +259,7 @@ RegisterPciDevice (
);
if (!EFI_ERROR (Status)) {
PciIoDevice->EmbeddedRom = FALSE;
- PciIoDevice->RomSize = PlatformOpRomSize;
+ PciIoDevice->RomSize = (UINT32) PlatformOpRomSize;
PciIoDevice->PciIo.RomSize = PlatformOpRomSize;
PciIoDevice->PciIo.RomImage = PlatformOpRomBuffer;
//
@@ -285,7 +285,7 @@ RegisterPciDevice (
);
if (!EFI_ERROR (Status)) {
PciIoDevice->EmbeddedRom = FALSE;
- PciIoDevice->RomSize = PlatformOpRomSize;
+ PciIoDevice->RomSize = (UINT32) PlatformOpRomSize;
PciIoDevice->PciIo.RomSize = PlatformOpRomSize;
PciIoDevice->PciIo.RomImage = PlatformOpRomBuffer;
//
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
index f44db01a9d..f8ba342681 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
@@ -1,7 +1,7 @@
/** @file
PCI eunmeration implementation on entire PCI bus system for PCI Bus module.
-Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
(C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -528,15 +528,15 @@ DetermineRootBridgeAttributes (
@return Max size of option rom needed.
**/
-UINT64
+UINT32
GetMaxOptionRomSize (
IN PCI_IO_DEVICE *Bridge
)
{
LIST_ENTRY *CurrentLink;
PCI_IO_DEVICE *Temp;
- UINT64 MaxOptionRomSize;
- UINT64 TempOptionRomSize;
+ UINT32 MaxOptionRomSize;
+ UINT32 TempOptionRomSize;
MaxOptionRomSize = 0;
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h
index 2df1fb0b94..ed4c875d36 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h
@@ -1,7 +1,7 @@
/** @file
PCI bus enumeration logic function declaration for PCI bus module.
-Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -109,7 +109,7 @@ DetermineRootBridgeAttributes (
@return Max size of option rom needed.
**/
-UINT64
+UINT32
GetMaxOptionRomSize (
IN PCI_IO_DEVICE *Bridge
);
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
index ee5c77147e..cb9ef9c7d1 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
@@ -1,7 +1,7 @@
/** @file
Internal library implementation for PCI Bus module.
-Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
(C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -415,7 +415,7 @@ PciHostBridgeResourceAllocator (
UINT64 PMem32ResStatus;
UINT64 Mem64ResStatus;
UINT64 PMem64ResStatus;
- UINT64 MaxOptionRomSize;
+ UINT32 MaxOptionRomSize;
PCI_RESOURCE_NODE *IoBridge;
PCI_RESOURCE_NODE *Mem32Bridge;
PCI_RESOURCE_NODE *PMem32Bridge;
--
2.20.1.windows.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v2 2/3] MdeModulePkg/PciBus: Correct typos
2019-02-12 9:47 [PATCH v2 0/3] MdeModulePkg/PciBus: Fix a bug PPB MEM32 BAR isn't restored sometimes Ray Ni
2019-02-12 9:47 ` [PATCH v2 1/3] MdeModulePkg/PciBus: Change PCI_IO_DEVICE.RomSize to UINT32 type Ray Ni
@ 2019-02-12 9:47 ` Ray Ni
2019-02-12 9:47 ` [PATCH v2 3/3] MdeModulePkg/PciBus: Fix a bug PPB MEM32 BAR isn't restored sometimes Ray Ni
2019-02-13 6:49 ` [PATCH v2 0/3] " Wu, Hao A
3 siblings, 0 replies; 5+ messages in thread
From: Ray Ni @ 2019-02-12 9:47 UTC (permalink / raw)
To: edk2-devel; +Cc: Hao Wu
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
---
MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c | 14 ++---
MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.h | 16 ++---
.../Bus/Pci/PciBusDxe/PciDeviceSupport.c | 14 ++---
.../Bus/Pci/PciBusDxe/PciDeviceSupport.h | 14 ++---
.../Bus/Pci/PciBusDxe/PciDriverOverride.c | 4 +-
.../Bus/Pci/PciBusDxe/PciDriverOverride.h | 4 +-
.../Bus/Pci/PciBusDxe/PciEnumerator.h | 4 +-
.../Bus/Pci/PciBusDxe/PciEnumeratorSupport.c | 42 ++++++-------
.../Bus/Pci/PciBusDxe/PciEnumeratorSupport.h | 16 ++---
.../Bus/Pci/PciBusDxe/PciHotPlugSupport.c | 16 ++---
.../Bus/Pci/PciBusDxe/PciHotPlugSupport.h | 18 +++---
MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c | 16 ++---
MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h | 4 +-
.../Bus/Pci/PciBusDxe/PciOptionRomSupport.c | 6 +-
.../Bus/Pci/PciBusDxe/PciOptionRomSupport.h | 4 +-
.../Bus/Pci/PciBusDxe/PciPowerManagement.c | 4 +-
.../Bus/Pci/PciBusDxe/PciPowerManagement.h | 4 +-
.../Bus/Pci/PciBusDxe/PciResourceSupport.c | 62 +++++++++----------
.../Bus/Pci/PciBusDxe/PciResourceSupport.h | 41 ++++++------
MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.h | 7 +--
20 files changed, 154 insertions(+), 156 deletions(-)
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c
index 0bc1fbfeff..a71868cbf8 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c
@@ -1,7 +1,7 @@
/** @file
PCI command register operations supporting functions implementation for PCI Bus module.
-Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -75,12 +75,12 @@ PciOperateRegister (
}
/**
- Check the cpability supporting by given device.
+ Check the capability supporting by given device.
@param PciIoDevice Pointer to instance of PCI_IO_DEVICE.
- @retval TRUE Cpability supportted.
- @retval FALSE Cpability not supportted.
+ @retval TRUE Capability supported.
+ @retval FALSE Capability not supported.
**/
BOOLEAN
@@ -103,7 +103,7 @@ PciCapabilitySupport (
@param Offset A pointer to the offset returned.
@param NextRegBlock A pointer to the next block returned.
- @retval EFI_SUCCESS Successfuly located capability register block.
+ @retval EFI_SUCCESS Successfully located capability register block.
@retval EFI_UNSUPPORTED Pci device does not support capability.
@retval EFI_NOT_FOUND Pci device support but can not find register block.
@@ -121,7 +121,7 @@ LocateCapabilityRegBlock (
UINT8 CapabilityID;
//
- // To check the cpability of this device supports
+ // To check the capability of this device supports
//
if (!PciCapabilitySupport (PciIoDevice)) {
return EFI_UNSUPPORTED;
@@ -195,7 +195,7 @@ LocateCapabilityRegBlock (
@param Offset A pointer to the offset returned.
@param NextRegBlock A pointer to the next block returned.
- @retval EFI_SUCCESS Successfuly located capability register block.
+ @retval EFI_SUCCESS Successfully located capability register block.
@retval EFI_UNSUPPORTED Pci device does not support capability.
@retval EFI_NOT_FOUND Pci device support but can not find register block.
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.h
index cc942d0d42..3e1746b969 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.h
@@ -1,7 +1,7 @@
/** @file
PCI command register operations supporting functions declaration for PCI Bus module.
-Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -84,12 +84,12 @@ PciOperateRegister (
);
/**
- Check the cpability supporting by given device.
+ Check the capability supporting by given device.
@param PciIoDevice Pointer to instance of PCI_IO_DEVICE.
- @retval TRUE Cpability supportted.
- @retval FALSE Cpability not supportted.
+ @retval TRUE Capability supported.
+ @retval FALSE Capability not supported.
**/
BOOLEAN
@@ -105,7 +105,7 @@ PciCapabilitySupport (
@param Offset A pointer to the offset returned.
@param NextRegBlock A pointer to the next block returned.
- @retval EFI_SUCCESS Successfuly located capability register block.
+ @retval EFI_SUCCESS Successfully located capability register block.
@retval EFI_UNSUPPORTED Pci device does not support capability.
@retval EFI_NOT_FOUND Pci device support but can not find register block.
@@ -126,7 +126,7 @@ LocateCapabilityRegBlock (
@param Offset A pointer to the offset returned.
@param NextRegBlock A pointer to the next block returned.
- @retval EFI_SUCCESS Successfuly located capability register block.
+ @retval EFI_SUCCESS Successfully located capability register block.
@retval EFI_UNSUPPORTED Pci device does not support capability.
@retval EFI_NOT_FOUND Pci device support but can not find register block.
@@ -176,7 +176,7 @@ LocatePciExpressCapabilityRegBlock (
PciOperateRegister (a, b, PCI_COMMAND_OFFSET, EFI_ENABLE_REGISTER, NULL)
/**
- Macro that disalbes command register.
+ Macro that disables command register.
@param a[in] Pointer to instance of PCI_IO_DEVICE.
@param b[in] The disabled value written into command register.
@@ -224,7 +224,7 @@ LocatePciExpressCapabilityRegBlock (
PciOperateRegister (a, b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_ENABLE_REGISTER, NULL)
/**
- Macro that disalbes PCI bridge control register.
+ Macro that disables PCI bridge control register.
@param a[in] Pointer to instance of PCI_IO_DEVICE.
@param b[in] The disabled value written into command register.
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
index 7fb8e596f5..764845252f 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
@@ -1,5 +1,5 @@
/** @file
- Supporting functions implementaion for PCI devices management.
+ Supporting functions implementation for PCI devices management.
Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
(C) Copyright 2018 Hewlett Packard Enterprise Development LP<BR>
@@ -66,7 +66,7 @@ InsertPciDevice (
}
/**
- Destroy root bridge and remove it from deivce tree.
+ Destroy root bridge and remove it from device tree.
@param RootBridge The bridge want to be removed.
@@ -86,7 +86,7 @@ DestroyRootBridge (
All direct or indirect allocated resource for this node will be freed.
- @param PciIoDevice A pointer to the PCI_IO_DEVICE to be destoried.
+ @param PciIoDevice A pointer to the PCI_IO_DEVICE to be destroyed.
**/
VOID
@@ -155,7 +155,7 @@ DestroyPciDeviceTree (
@param Controller Root bridge handle.
- @retval EFI_SUCCESS Destory all devcie nodes successfully.
+ @retval EFI_SUCCESS Destroy all device nodes successfully.
@retval EFI_NOT_FOUND Cannot find any PCI device under specified
root bridge.
@@ -824,7 +824,7 @@ StartPciDevices (
/**
Create root bridge device.
- @param RootBridgeHandle Specified root bridge hanle.
+ @param RootBridgeHandle Specified root bridge handle.
@return The crated root bridge device instance, NULL means no
root bridge device instance created.
@@ -937,9 +937,9 @@ GetRootBridgeByHandle (
}
/**
- Judege whether Pci device existed.
+ Judge whether Pci device existed.
- @param Bridge Parent bridege instance.
+ @param Bridge Parent bridge instance.
@param PciIoDevice Device instance.
@retval TRUE Pci device existed.
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.h
index b45d2a5d77..686df91ec9 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.h
@@ -1,7 +1,7 @@
/** @file
Supporting functions declaration for PCI devices management.
-Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -50,7 +50,7 @@ InsertPciDevice (
);
/**
- Destroy root bridge and remove it from deivce tree.
+ Destroy root bridge and remove it from device tree.
@param RootBridge The bridge want to be removed.
@@ -80,7 +80,7 @@ DestroyPciDeviceTree (
@param Controller Root bridge handle.
- @retval EFI_SUCCESS Destory all devcie nodes successfully.
+ @retval EFI_SUCCESS Destroy all device nodes successfully.
@retval EFI_NOT_FOUND Cannot find any PCI device under specified
root bridge.
@@ -187,7 +187,7 @@ StartPciDevices (
/**
Create root bridge device.
- @param RootBridgeHandle Specified root bridge hanle.
+ @param RootBridgeHandle Specified root bridge handle.
@return The crated root bridge device instance, NULL means no
root bridge device instance created.
@@ -214,9 +214,9 @@ GetRootBridgeByHandle (
/**
- Judege whether Pci device existed.
+ Judge whether Pci device existed.
- @param Bridge Parent bridege instance.
+ @param Bridge Parent bridge instance.
@param PciIoDevice Device instance.
@retval TRUE Pci device existed.
@@ -261,7 +261,7 @@ LocateVgaDevice (
All direct or indirect allocated resource for this node will be freed.
- @param PciIoDevice A pointer to the PCI_IO_DEVICE to be destoried.
+ @param PciIoDevice A pointer to the PCI_IO_DEVICE to be destroyed.
**/
VOID
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.c
index e8fae17e8b..69d37f737e 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.c
@@ -1,7 +1,7 @@
/** @file
- Functions implementation for Bus Specific Driver Override protoocl.
+ Functions implementation for Bus Specific Driver Override protocol.
-Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.h
index f0679c51ec..076b80d94d 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.h
@@ -1,7 +1,7 @@
/** @file
- Functions declaration for Bus Specific Driver Override protoocl.
+ Functions declaration for Bus Specific Driver Override protocol.
-Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h
index ed4c875d36..04cc2b775a 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h
@@ -442,8 +442,8 @@ NotifyPhase (
@retval EFI_INVALID_PARAMETER Phase is not a valid phase that is defined in
EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE.
@retval EFI_DEVICE_ERROR Programming failed due to a hardware error. The PCI enumerator should
- not enumerate this device, including its child devices if it is a PCI-to-PCI
- bridge.
+ not enumerate this device, including its child devices if it is a PCI-to-PCI
+ bridge.
**/
EFI_STATUS
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
index cfd291ef7d..9b59e85bcd 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
@@ -1,7 +1,7 @@
/** @file
PCI emumeration support functions implementation for PCI Bus module.
-Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
(C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -88,7 +88,7 @@ PciDevicePresent (
root bridge will then be created.
@param Bridge Parent bridge instance.
- @param StartBusNumber Bus number of begining.
+ @param StartBusNumber Bus number of beginning.
@retval EFI_SUCCESS PCI device is found.
@retval other Some error occurred when reading PCI bridge information.
@@ -208,7 +208,7 @@ PciPciDeviceInfoCollector (
}
/**
- Seach required device and create PCI device instance.
+ Search required device and create PCI device instance.
@param Bridge Parent bridge instance.
@param Pci Input PCI device information block.
@@ -370,14 +370,14 @@ DumpPpbPaddingResource (
if (Descriptor->AddrSpaceGranularity == 32) {
//
- // prefechable
+ // prefetchable
//
if (Descriptor->SpecificFlag == EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE) {
Type = PciBarTypePMem32;
}
//
- // Non-prefechable
+ // Non-prefetchable
//
if (Descriptor->SpecificFlag == 0) {
Type = PciBarTypeMem32;
@@ -386,14 +386,14 @@ DumpPpbPaddingResource (
if (Descriptor->AddrSpaceGranularity == 64) {
//
- // prefechable
+ // prefetchable
//
if (Descriptor->SpecificFlag == EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE) {
Type = PciBarTypePMem64;
}
//
- // Non-prefechable
+ // Non-prefetchable
//
if (Descriptor->SpecificFlag == 0) {
Type = PciBarTypeMem64;
@@ -568,7 +568,7 @@ GatherPpbInfo (
PCI_DISABLE_COMMAND_REGISTER (PciIoDevice, EFI_PCI_COMMAND_BITS_OWNED);
//
- // Initalize the bridge control register
+ // Initialize the bridge control register
//
PCI_DISABLE_BRIDGE_CONTROL_REGISTER (PciIoDevice, EFI_PCI_BRIDGE_CONTROL_BITS_OWNED);
@@ -722,7 +722,7 @@ GatherP2CInfo (
PCI_DISABLE_COMMAND_REGISTER (PciIoDevice, EFI_PCI_COMMAND_BITS_OWNED);
//
- // Initalize the bridge control register
+ // Initialize the bridge control register
//
PCI_DISABLE_BRIDGE_CONTROL_REGISTER (PciIoDevice, EFI_PCCARD_BRIDGE_CONTROL_BITS_OWNED);
}
@@ -746,7 +746,7 @@ GatherP2CInfo (
}
/**
- Create device path for pci deivce.
+ Create device path for pci device.
@param ParentDevicePath Parent bridge's path.
@param PciIoDevice Pci device instance.
@@ -922,7 +922,7 @@ BarExisted (
@param PciIoDevice Pci device instance.
@param Command Input command register value, and
returned supported register value.
- @param BridgeControl Inout bridge control value for PPB or P2C, and
+ @param BridgeControl Input bridge control value for PPB or P2C, and
returned supported bridge control value.
@param OldCommand Returned and stored old command register offset.
@param OldBridgeControl Returned and stored old Bridge control value for PPB or P2C.
@@ -1205,7 +1205,7 @@ DetermineDeviceAttribute (
EFI_STATUS Status;
//
- // For Root Bridge, just copy it by RootBridgeIo proctocol
+ // For Root Bridge, just copy it by RootBridgeIo protocol
// so as to keep consistent with the actual attribute
//
if (PciIoDevice->Parent == NULL) {
@@ -1282,7 +1282,7 @@ DetermineDeviceAttribute (
return Status;
}
//
- // Detect Fast Bact to Bact support for the device under the bridge
+ // Detect Fast Back to Back support for the device under the bridge
//
Status = GetFastBackToBackSupport (Temp, PCI_PRIMARY_STATUS_OFFSET);
if (FastB2BSupport && EFI_ERROR (Status)) {
@@ -1695,7 +1695,7 @@ PciIovParseVfBar (
}
//
- // Fix the length to support some spefic 64 bit BAR
+ // Fix the length to support some special 64 bit BAR
//
Value |= ((UINT32) -1 << HighBitSet32 (Value));
@@ -1822,7 +1822,7 @@ PciParseBar (
}
//
- // Workaround. Some platforms inplement IO bar with 0 length
+ // Workaround. Some platforms implement IO bar with 0 length
// Need to treat it as no-bar
//
if (PciIoDevice->PciBar[BarIndex].Length == 0) {
@@ -1906,7 +1906,7 @@ PciParseBar (
}
//
- // Fix the length to support some spefic 64 bit BAR
+ // Fix the length to support some special 64 bit BAR
//
if (Value == 0) {
DEBUG ((EFI_D_INFO, "[PciBus]BAR probing for upper 32bit of MEM64 BAR returns 0, change to 0xFFFFFFFF.\n"));
@@ -1987,7 +1987,7 @@ InitializePciDevice (
//
// Put all the resource apertures
// Resource base is set to all ones so as to indicate its resource
- // has not been alloacted
+ // has not been allocated
//
for (Offset = 0x10; Offset <= 0x24; Offset += sizeof (UINT32)) {
PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, Offset, 1, &gAllOne);
@@ -2077,10 +2077,10 @@ InitializeP2C (
}
/**
- Create and initiliaze general PCI I/O device instance for
+ Create and initialize general PCI I/O device instance for
PCI device/bridge device/hotplug bridge device.
- @param PciRootBridgeIo Pointer to instance of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
+ @param Bridge Parent bridge instance.
@param Pci Input Pci information block.
@param Bus Device Bus NO.
@param Device Device device NO.
@@ -2443,7 +2443,7 @@ PciEnumeratorLight (
}
//
- // Record the root bridgeio protocol
+ // Record the root bridge-io protocol
//
RootBridgeDev->PciRootBridgeIo = PciRootBridgeIo;
@@ -2476,7 +2476,7 @@ PciEnumeratorLight (
} else {
//
- // If unsuccessly, destroy the entire node
+ // If unsuccessfully, destroy the entire node
//
DestroyRootBridge (RootBridgeDev);
}
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.h
index 42306e9a47..b51a8705bb 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.h
@@ -1,7 +1,7 @@
/** @file
- PCI emumeration support functions declaration for PCI Bus module.
+ PCI enumeration support functions declaration for PCI Bus module.
-Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -44,7 +44,7 @@ PciDevicePresent (
root bridge will then be created.
@param Bridge Parent bridge instance.
- @param StartBusNumber Bus number of begining.
+ @param StartBusNumber Bus number of beginning.
@retval EFI_SUCCESS PCI device is found.
@retval other Some error occurred when reading PCI bridge information.
@@ -57,7 +57,7 @@ PciPciDeviceInfoCollector (
);
/**
- Seach required device and create PCI device instance.
+ Search required device and create PCI device instance.
@param Bridge Parent bridge instance.
@param Pci Input PCI device information block.
@@ -144,12 +144,12 @@ GatherP2CInfo (
);
/**
- Create device path for pci deivce.
+ Create device path for pci device.
@param ParentDevicePath Parent bridge's path.
@param PciIoDevice Pci device instance.
- @return device path protocol instance for specific pci device.
+ @return Device path protocol instance for specific pci device.
**/
EFI_DEVICE_PATH_PROTOCOL *
@@ -204,7 +204,7 @@ BarExisted (
@param PciIoDevice Pci device instance.
@param Command Input command register value, and
returned supported register value.
- @param BridgeControl Inout bridge control value for PPB or P2C, and
+ @param BridgeControl Input bridge control value for PPB or P2C, and
returned supported bridge control value.
@param OldCommand Returned and stored old command register offset.
@param OldBridgeControl Returned and stored old Bridge control value for PPB or P2C.
@@ -361,7 +361,7 @@ InitializeP2C (
);
/**
- Create and initiliaze general PCI I/O device instance for
+ Create and initialize general PCI I/O device instance for
PCI device/bridge device/hotplug bridge device.
@param Bridge Parent bridge instance.
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.c
index 73bcd32788..316c15d5de 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.c
@@ -1,7 +1,7 @@
/** @file
PCI Hot Plug support functions implementation for PCI Bus module..
-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -41,7 +41,7 @@ PciHPCInitialized (
}
/**
- Compare two device pathes to check if they are exactly same.
+ Compare two device paths to check if they are exactly same.
@param DevicePath1 A pointer to the first device path data structure.
@param DevicePath2 A pointer to the second device path data structure.
@@ -81,7 +81,7 @@ EfiCompareDevicePath (
private data structure.
@retval EFI_SUCCESS They are same.
- @retval EFI_UNSUPPORTED No PCI Hot Plug controler on the platform.
+ @retval EFI_UNSUPPORTED No PCI Hot Plug controller on the platform.
@retval EFI_OUT_OF_RESOURCES No memory to constructor root hot plug private
data structure.
@@ -137,7 +137,7 @@ InitializeHotPlugSupport (
@param HpbDevicePath A pointer to device path data structure to be tested.
@param HpIndex If HpIndex is not NULL, return the index of root hot
- plug in global array when TRUE is retuned.
+ plug in global array when TRUE is returned.
@retval TRUE The device path is for root pci hot plug bus.
@retval FALSE The device path is not for root pci hot plug bus.
@@ -171,7 +171,7 @@ IsRootPciHotPlugBus (
@param HpcDevicePath A pointer to device path data structure to be tested.
@param HpIndex If HpIndex is not NULL, return the index of root hot
- plug in global array when TRUE is retuned.
+ plug in global array when TRUE is returned.
@retval TRUE The device path is for root pci hot plug controller.
@retval FALSE The device path is not for root pci hot plug controller.
@@ -204,9 +204,9 @@ IsRootPciHotPlugController (
Creating event object for PCI Hot Plug controller.
@param HpIndex Index of hot plug device in global array.
- @param Event The retuned event that invoke this function.
+ @param Event The returned event that invoke this function.
- @return Status of create event invoken.
+ @return Status of create event.
**/
EFI_STATUS
@@ -328,7 +328,7 @@ IsSHPC (
@param[in] PciIoDevice The device being checked.
- @retval TRUE PciIoDevice is a PCIe port that accepts a hotplugged device.
+ @retval TRUE PciIoDevice is a PCIe port that accepts a hot-plugged device.
@retval FALSE Otherwise.
**/
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.h
index a285d94c93..e8f7f67893 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.h
@@ -1,7 +1,7 @@
/** @file
PCI Hot Plug support functions declaration for PCI Bus module.
-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -31,7 +31,7 @@ typedef struct {
} ROOT_HPC_DATA;
//
-// Reference of some global variabes
+// Reference of some global variables
//
extern EFI_PCI_HOT_PLUG_INIT_PROTOCOL *gPciHotPlugInit;
extern EFI_HPC_LOCATION *gPciRootHpcPool;
@@ -52,7 +52,7 @@ PciHPCInitialized (
);
/**
- Compare two device pathes to check if they are exactly same.
+ Compare two device paths to check if they are exactly same.
@param DevicePath1 A pointer to the first device path data structure.
@param DevicePath2 A pointer to the second device path data structure.
@@ -75,7 +75,7 @@ EfiCompareDevicePath (
private data structure.
@retval EFI_SUCCESS They are same.
- @retval EFI_UNSUPPORTED No PCI Hot Plug controler on the platform.
+ @retval EFI_UNSUPPORTED No PCI Hot Plug controller on the platform.
@retval EFI_OUT_OF_RESOURCES No memory to constructor root hot plug private
data structure.
@@ -104,7 +104,7 @@ IsPciHotPlugBus (
@param HpbDevicePath A pointer to device path data structure to be tested.
@param HpIndex If HpIndex is not NULL, return the index of root hot
- plug in global array when TRUE is retuned.
+ plug in global array when TRUE is returned.
@retval TRUE The device path is for root pci hot plug bus.
@retval FALSE The device path is not for root pci hot plug bus.
@@ -121,7 +121,7 @@ IsRootPciHotPlugBus (
@param HpcDevicePath A pointer to device path data structure to be tested.
@param HpIndex If HpIndex is not NULL, return the index of root hot
- plug in global array when TRUE is retuned.
+ plug in global array when TRUE is returned.
@retval TRUE The device path is for root pci hot plug controller.
@retval FALSE The device path is not for root pci hot plug controller.
@@ -137,9 +137,9 @@ IsRootPciHotPlugController (
Creating event object for PCI Hot Plug controller.
@param HpIndex Index of hot plug device in global array.
- @param Event The retuned event that invoke this function.
+ @param Event The returned event that invoke this function.
- @return Status of create event invoken.
+ @return Status of create event.
**/
EFI_STATUS
@@ -188,7 +188,7 @@ IsSHPC (
@param[in] PciIoDevice The device being checked.
- @retval TRUE PciIoDevice is a PCIe port that accepts a hotplugged device.
+ @retval TRUE PciIoDevice is a PCIe port that accepts a hot-plugged device.
@retval FALSE Otherwise.
**/
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c
index 2a4f66a01a..a197bbc6e0 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c
@@ -1,7 +1,7 @@
/** @file
EFI PCI IO protocol functions implementation for PCI Bus module.
-Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -1316,7 +1316,7 @@ CheckBarType (
@param Operation Set or Disable.
@retval EFI_UNSUPPORTED If root bridge does not support change attribute.
- @retval EFI_SUCCESS Successfully set new attributs.
+ @retval EFI_SUCCESS Successfully set new attributes.
**/
EFI_STATUS
@@ -1419,7 +1419,7 @@ SupportPaletteSnoopAttributes (
if (Temp == NULL) {
//
- // If there is no VGA device on the segement, set
+ // If there is no VGA device on the segment, set
// this graphics card to decode the palette range
//
return EFI_SUCCESS;
@@ -1588,7 +1588,7 @@ PciIoAttributes (
//
// Just a trick for ENABLE attribute
// EFI_PCI_DEVICE_ENABLE is not defined in UEFI spec, which is the internal usage.
- // So, this logic doesn't confrom to UEFI spec, which should be removed.
+ // So, this logic doesn't conform to UEFI spec, which should be removed.
// But this trick logic is still kept for some binary drivers that depend on it.
//
if ((Attributes & EFI_PCI_DEVICE_ENABLE) == EFI_PCI_DEVICE_ENABLE) {
@@ -1725,7 +1725,7 @@ PciIoAttributes (
Command |= EFI_PCI_COMMAND_BUS_MASTER;
}
//
- // The upstream bridge should be also set to revelant attribute
+ // The upstream bridge should be also set to relevant attribute
// expect for IO, Mem and BusMaster
//
UpStreamAttributes = Attributes &
@@ -1911,7 +1911,7 @@ PciIoGetBarAttributes (
case PciBarTypePMem32:
//
- // prefechable
+ // prefetchable
//
Descriptor->SpecificFlag = EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE;
//
@@ -1930,7 +1930,7 @@ PciIoGetBarAttributes (
case PciBarTypePMem64:
//
- // prefechable
+ // prefetchable
//
Descriptor->SpecificFlag = EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE;
//
@@ -2042,7 +2042,7 @@ PciIoSetBarAttributes (
return EFI_UNSUPPORTED;
}
//
- // Attributes must be supported. Make sure the BAR range describd by BarIndex, Offset, and
+ // Attributes must be supported. Make sure the BAR range described by BarIndex, Offset, and
// Length are valid for this PCI device.
//
NonRelativeOffset = *Offset;
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h
index 69e7c32881..c88b19a330 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h
@@ -1,7 +1,7 @@
/** @file
EFI PCI IO protocol functions declaration for PCI Bus module.
-Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -527,7 +527,7 @@ CheckBarType (
@param Operation Set or Disable.
@retval EFI_UNSUPPORTED If root bridge does not support change attribute.
- @retval EFI_SUCCESS Successfully set new attributs.
+ @retval EFI_SUCCESS Successfully set new attributes.
**/
EFI_STATUS
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c
index aa314474dd..c75ef1a825 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c
@@ -1,7 +1,7 @@
/** @file
PCI Rom supporting funtions implementation for PCI Bus module.
-Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -604,7 +604,7 @@ RomDecode (
//
// Programe all upstream bridge
//
- ProgrameUpstreamBridgeForRom(PciDevice, RomBar, TRUE);
+ ProgramUpstreamBridgeForRom (PciDevice, RomBar, TRUE);
//
// Setting the memory space bit in the function's command register
@@ -621,7 +621,7 @@ RomDecode (
//
// Destroy the programmed bar in all the upstream bridge.
//
- ProgrameUpstreamBridgeForRom(PciDevice, RomBar, FALSE);
+ ProgramUpstreamBridgeForRom (PciDevice, RomBar, FALSE);
//
// disable rom decode
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.h
index 25f78a417f..f51e6b5ce0 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.h
@@ -1,7 +1,7 @@
/** @file
- PCI Rom supporting funtions declaration for PCI Bus module.
+ PCI Rom supporting functions declaration for PCI Bus module.
-Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c
index ab655e7657..3043f3c4aa 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c
@@ -1,7 +1,7 @@
/** @file
- Power management support fucntions implementation for PCI Bus module.
+ Power management support functions implementation for PCI Bus module.
-Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.h
index 45ba59f286..f9ea9f9915 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.h
@@ -1,7 +1,7 @@
/** @file
- Power management support fucntions delaration for PCI Bus module.
+ Power management support functions declaration for PCI Bus module.
-Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
index d3cbefbadf..f5ae3d857b 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
@@ -1,7 +1,7 @@
/** @file
- PCI resouces support functions implemntation for PCI Bus module.
+ PCI resources support functions implementation for PCI Bus module.
-Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -134,11 +134,11 @@ InsertResourceNode (
/**
This routine is used to merge two different resource trees in need of
- resoure degradation.
+ resource degradation.
For example, if an upstream PPB doesn't support,
prefetchable memory decoding, the PCI bus driver will choose to call this function
- to merge prefectchable memory resource list into normal memory list.
+ to merge prefetchable memory resource list into normal memory list.
If the TypeMerge is TRUE, Res resource type is changed to the type of destination resource
type.
@@ -335,7 +335,7 @@ CalculateApertureIo16 (
This function is used to calculate the resource aperture
for a given bridge device.
- @param Bridge PCI resouce node for given bridge device.
+ @param Bridge PCI resource node for given bridge device.
**/
VOID
@@ -413,7 +413,7 @@ CalculateResourceAperture (
}
/**
- Get IO/Memory resource infor for given PCI device.
+ Get IO/Memory resource info for given PCI device.
@param PciDev Pci device instance.
@param IoNode Resource info node for IO .
@@ -832,7 +832,7 @@ CreateResourceMap (
);
//
- // Recursively create resouce map on this bridge
+ // Recursively create resource map on this bridge
//
CreateResourceMap (
Temp,
@@ -1195,10 +1195,10 @@ BridgeSupportResourceDecode (
This function is used to program the resource allocated
for each resource node under specified bridge.
- @param Base Base address of resource to be progammed.
+ @param Base Base address of resource to be programmed.
@param Bridge PCI resource node for the bridge device.
- @retval EFI_SUCCESS Successfully to program all resouces
+ @retval EFI_SUCCESS Successfully to program all resources
on given PCI bridge device.
@retval EFI_OUT_OF_RESOURCES Base is all one.
@@ -1257,8 +1257,8 @@ ProgramResource (
/**
Program Bar register for PCI device.
- @param Base Base address for PCI device resource to be progammed.
- @param Node Point to resoure node structure.
+ @param Base Base address for PCI device resource to be programmed.
+ @param Node Point to resource node structure.
**/
VOID
@@ -1354,8 +1354,8 @@ ProgramBar (
/**
Program IOV VF Bar register for PCI device.
- @param Base Base address for PCI device resource to be progammed.
- @param Node Point to resoure node structure.
+ @param Base Base address for PCI device resource to be programmed.
+ @param Node Point to resource node structure.
**/
EFI_STATUS
@@ -1438,10 +1438,10 @@ ProgramVfBar (
}
/**
- Program PCI-PCI bridge apperture.
+ Program PCI-PCI bridge aperture.
@param Base Base address for resource.
- @param Node Point to resoure node structure.
+ @param Node Point to resource node structure.
**/
VOID
@@ -1457,7 +1457,7 @@ ProgramPpbApperture (
Address = 0;
//
// If no device resource of this PPB, return anyway
- // Apperture is set default in the initialization code
+ // Aperture is set default in the initialization code
//
if (Node->Length == 0 || Node->ResourceUsage == PciResUsagePadding) {
//
@@ -1649,13 +1649,13 @@ ProgramPpbApperture (
/**
Program parent bridge for Option Rom.
- @param PciDevice Pci deivce instance.
- @param OptionRomBase Base address for Optiona Rom.
+ @param PciDevice Pci device instance.
+ @param OptionRomBase Base address for Option Rom.
@param Enable Enable or disable PCI memory.
**/
VOID
-ProgrameUpstreamBridgeForRom (
+ProgramUpstreamBridgeForRom (
IN PCI_IO_DEVICE *PciDevice,
IN UINT32 OptionRomBase,
IN BOOLEAN Enable
@@ -1682,7 +1682,7 @@ ProgrameUpstreamBridgeForRom (
Node.Offset = 0;
//
- // Program PPB to only open a single <= 16MB apperture
+ // Program PPB to only open a single <= 16MB aperture
//
if (Enable) {
//
@@ -1763,7 +1763,7 @@ InitializeResourcePool (
}
/**
- Destory given resource tree.
+ Destroy given resource tree.
@param Bridge PCI resource root node of resource tree.
@@ -1820,7 +1820,7 @@ ResourcePaddingForCardBusBridge (
//
// Memory Base/Limit Register 0
- // Bar 1 denodes memory range 0
+ // Bar 1 decodes memory range 0
//
Node = CreateResourceNode (
PciDev,
@@ -1838,7 +1838,7 @@ ResourcePaddingForCardBusBridge (
//
// Memory Base/Limit Register 1
- // Bar 2 denodes memory range1
+ // Bar 2 decodes memory range1
//
Node = CreateResourceNode (
PciDev,
@@ -1856,7 +1856,7 @@ ResourcePaddingForCardBusBridge (
//
// Io Base/Limit
- // Bar 3 denodes io range 0
+ // Bar 3 decodes io range 0
//
Node = CreateResourceNode (
PciDev,
@@ -1874,7 +1874,7 @@ ResourcePaddingForCardBusBridge (
//
// Io Base/Limit
- // Bar 4 denodes io range 0
+ // Bar 4 decodes io range 0
//
Node = CreateResourceNode (
PciDev,
@@ -1978,7 +1978,7 @@ ProgramP2C (
} else {
//
- // Set pre-fetchable bit
+ // Set prefetchable bit
//
PciIo->Pci.Read (
PciIo,
@@ -2048,7 +2048,7 @@ ProgramP2C (
} else {
//
- // Set pre-fetchable bit
+ // Set prefetchable bit
//
PciIo->Pci.Read (
PciIo,
@@ -2181,7 +2181,7 @@ ApplyResourcePadding (
if (Ptr->AddrSpaceGranularity == 32) {
//
- // prefechable
+ // prefetchable
//
if (Ptr->SpecificFlag == 0x6) {
if (Ptr->AddrLen != 0) {
@@ -2204,7 +2204,7 @@ ApplyResourcePadding (
}
//
- // Non-prefechable
+ // Non-prefetchable
//
if (Ptr->SpecificFlag == 0) {
if (Ptr->AddrLen != 0) {
@@ -2230,7 +2230,7 @@ ApplyResourcePadding (
if (Ptr->AddrSpaceGranularity == 64) {
//
- // prefechable
+ // prefetchable
//
if (Ptr->SpecificFlag == 0x6) {
if (Ptr->AddrLen != 0) {
@@ -2253,7 +2253,7 @@ ApplyResourcePadding (
}
//
- // Non-prefechable
+ // Non-prefetchable
//
if (Ptr->SpecificFlag == 0) {
if (Ptr->AddrLen != 0) {
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h
index 763ddbc4ed..d3c1204993 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h
@@ -1,7 +1,7 @@
/** @file
- PCI resouces support functions declaration for PCI Bus module.
+ PCI resources support functions declaration for PCI Bus module.
-Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -82,11 +82,11 @@ InsertResourceNode (
/**
This routine is used to merge two different resource trees in need of
- resoure degradation.
+ resource degradation.
For example, if an upstream PPB doesn't support,
prefetchable memory decoding, the PCI bus driver will choose to call this function
- to merge prefectchable memory resource list into normal memory list.
+ to merge prefetchable memory resource list into normal memory list.
If the TypeMerge is TRUE, Res resource type is changed to the type of destination resource
type.
@@ -121,7 +121,7 @@ CalculateApertureIo16 (
This function is used to calculate the resource aperture
for a given bridge device.
- @param Bridge PCI resouce node for given bridge device.
+ @param Bridge PCI resource node for given bridge device.
**/
VOID
@@ -130,7 +130,7 @@ CalculateResourceAperture (
);
/**
- Get IO/Memory resource infor for given PCI device.
+ Get IO/Memory resource info for given PCI device.
@param PciDev Pci device instance.
@param IoNode Resource info node for IO .
@@ -175,8 +175,7 @@ CreateResourceNode (
);
/**
- This function is used to extract resource request from
- IOV VF device node list.
+ This function is used to create a IOV VF resource node.
@param PciDev Pci device instance.
@param Length Length of Io/Memory resource.
@@ -185,7 +184,7 @@ CreateResourceNode (
@param ResType Type of resource: IO/Memory.
@param ResUsage Resource usage.
- @return PCI resource node created for given PCI device.
+ @return PCI resource node created for given VF PCI device.
NULL means PCI resource node is not created.
**/
@@ -285,10 +284,10 @@ BridgeSupportResourceDecode (
This function is used to program the resource allocated
for each resource node under specified bridge.
- @param Base Base address of resource to be progammed.
+ @param Base Base address of resource to be programmed.
@param Bridge PCI resource node for the bridge device.
- @retval EFI_SUCCESS Successfully to program all resouces
+ @retval EFI_SUCCESS Successfully to program all resources
on given PCI bridge device.
@retval EFI_OUT_OF_RESOURCES Base is all one.
@@ -302,8 +301,8 @@ ProgramResource (
/**
Program Bar register for PCI device.
- @param Base Base address for PCI device resource to be progammed.
- @param Node Point to resoure node structure.
+ @param Base Base address for PCI device resource to be programmed.
+ @param Node Point to resource node structure.
**/
VOID
@@ -315,8 +314,8 @@ ProgramBar (
/**
Program IOV VF Bar register for PCI device.
- @param Base Base address for PCI device resource to be progammed.
- @param Node Point to resoure node structure.
+ @param Base Base address for PCI device resource to be programmed.
+ @param Node Point to resource node structure.
**/
EFI_STATUS
@@ -326,10 +325,10 @@ ProgramVfBar (
);
/**
- Program PCI-PCI bridge apperture.
+ Program PCI-PCI bridge aperture.
@param Base Base address for resource.
- @param Node Point to resoure node structure.
+ @param Node Point to resource node structure.
**/
VOID
@@ -341,13 +340,13 @@ ProgramPpbApperture (
/**
Program parent bridge for Option Rom.
- @param PciDevice Pci deivce instance.
- @param OptionRomBase Base address for Optiona Rom.
+ @param PciDevice Pci device instance.
+ @param OptionRomBase Base address for Option Rom.
@param Enable Enable or disable PCI memory.
**/
VOID
-ProgrameUpstreamBridgeForRom (
+ProgramUpstreamBridgeForRom (
IN PCI_IO_DEVICE *PciDevice,
IN UINT32 OptionRomBase,
IN BOOLEAN Enable
@@ -382,7 +381,7 @@ InitializeResourcePool (
);
/**
- Destory given resource tree.
+ Destroy given resource tree.
@param Bridge PCI resource root node of resource tree.
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.h
index a7a1ed4ce3..04e5f96aa7 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.h
@@ -1,7 +1,7 @@
/** @file
Set up ROM Table for PCI Bus module.
-Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -23,9 +23,8 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
@param Bus Bus NO of PCI space.
@param Dev Dev NO of PCI space.
@param Func Func NO of PCI space.
- @param RomImage Option ROM buffer.
- @param RomSize Size of Option ROM buffer.
-
+ @param RomImage Option Rom buffer.
+ @param RomSize Size of Option Rom buffer.
**/
VOID
PciRomAddImageMapping (
--
2.20.1.windows.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v2 3/3] MdeModulePkg/PciBus: Fix a bug PPB MEM32 BAR isn't restored sometimes
2019-02-12 9:47 [PATCH v2 0/3] MdeModulePkg/PciBus: Fix a bug PPB MEM32 BAR isn't restored sometimes Ray Ni
2019-02-12 9:47 ` [PATCH v2 1/3] MdeModulePkg/PciBus: Change PCI_IO_DEVICE.RomSize to UINT32 type Ray Ni
2019-02-12 9:47 ` [PATCH v2 2/3] MdeModulePkg/PciBus: Correct typos Ray Ni
@ 2019-02-12 9:47 ` Ray Ni
2019-02-13 6:49 ` [PATCH v2 0/3] " Wu, Hao A
3 siblings, 0 replies; 5+ messages in thread
From: Ray Ni @ 2019-02-12 9:47 UTC (permalink / raw)
To: edk2-devel; +Cc: Hao Wu, Dandan Bi
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1505
When a device under PPB contains option ROM but doesn't require 32bit
MMIO, ProgrameUpstreamBridgeForRom() cannot correctly restore the
PPB MEM32 RANGE BAR. It causes the 32bit MMIO conflict which may
cause system hangs in boot.
The root cause is when ProgrameUpstreamBridgeForRom() calls
ProgramPpbApperture() to restore the PPB MEM32 RANGE BAR, the
ProgramPpbApperture() skips to program the BAR when the resource
length is 0.
This patch fixes this issue by not calling ProgramPpbApperture().
Instead, it directly programs the PPB MEM32 RANGE BAR.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
---
.../Bus/Pci/PciBusDxe/PciResourceSupport.c | 51 +++++++++----------
1 file changed, 23 insertions(+), 28 deletions(-)
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
index f5ae3d857b..70e45040e2 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
@@ -1661,57 +1661,52 @@ ProgramUpstreamBridgeForRom (
IN BOOLEAN Enable
)
{
- PCI_IO_DEVICE *Parent;
- PCI_RESOURCE_NODE Node;
- UINT64 Base;
- UINT64 Length;
+ PCI_IO_DEVICE *Parent;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT16 Base;
+ UINT16 Limit;
//
// For root bridge, just return.
//
Parent = PciDevice->Parent;
- ZeroMem (&Node, sizeof (Node));
while (Parent != NULL) {
if (!IS_PCI_BRIDGE (&Parent->Pci)) {
break;
}
- Node.PciDev = Parent;
- Node.Alignment = 0;
- Node.Bar = PPB_MEM32_RANGE;
- Node.ResType = PciBarTypeMem32;
- Node.Offset = 0;
+ PciIo = &Parent->PciIo;
//
// Program PPB to only open a single <= 16MB aperture
//
if (Enable) {
- //
- // Save the original PPB_MEM32_RANGE BAR.
- // The values will be changed by ProgramPpbApperture().
- //
- Base = Parent->PciBar[Node.Bar].BaseAddress;
- Length = Parent->PciBar[Node.Bar].Length;
-
//
// Only cover MMIO for Option ROM.
//
- Node.Length = PciDevice->RomSize;
- ProgramPpbApperture (OptionRomBase, &Node);
-
- //
- // Restore the original PPB_MEM32_RANGE BAR.
- // So the MEM32 RANGE BAR register can be restored when disable the decoding.
- //
- Parent->PciBar[Node.Bar].BaseAddress = Base;
- Parent->PciBar[Node.Bar].Length = Length;
+ Base = (UINT16) (OptionRomBase >> 16);
+ Limit = (UINT16) ((OptionRomBase + PciDevice->RomSize - 1) >> 16);
+ PciIo->Pci.Write (PciIo, EfiPciIoWidthUint16, OFFSET_OF (PCI_TYPE01, Bridge.MemoryBase), 1, &Base);
+ PciIo->Pci.Write (PciIo, EfiPciIoWidthUint16, OFFSET_OF (PCI_TYPE01, Bridge.MemoryLimit), 1, &Limit);
PCI_ENABLE_COMMAND_REGISTER (Parent, EFI_PCI_COMMAND_MEMORY_SPACE);
} else {
//
// Cover 32bit MMIO for devices below the bridge.
//
- Node.Length = Parent->PciBar[Node.Bar].Length;
- ProgramPpbApperture (Parent->PciBar[Node.Bar].BaseAddress, &Node);
+ if (Parent->PciBar[PPB_MEM32_RANGE].Length == 0) {
+ //
+ // When devices under the bridge contains Option ROM and doesn't require 32bit MMIO.
+ //
+ Base = (UINT16) gAllOne;
+ Limit = (UINT16) gAllZero;
+ } else {
+ Base = (UINT16) ((UINT32) Parent->PciBar[PPB_MEM32_RANGE].BaseAddress >> 16);
+ Limit = (UINT16) ((UINT32) (Parent->PciBar[PPB_MEM32_RANGE].BaseAddress
+ + Parent->PciBar[PPB_MEM32_RANGE].Length - 1) >> 16);
+ }
+ PciIo->Pci.Write (PciIo, EfiPciIoWidthUint16, OFFSET_OF (PCI_TYPE01, Bridge.MemoryBase), 1, &Base);
+ PciIo->Pci.Write (PciIo, EfiPciIoWidthUint16, OFFSET_OF (PCI_TYPE01, Bridge.MemoryLimit), 1, &Limit);
+
PCI_DISABLE_COMMAND_REGISTER (Parent, EFI_PCI_COMMAND_MEMORY_SPACE);
}
--
2.20.1.windows.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v2 0/3] MdeModulePkg/PciBus: Fix a bug PPB MEM32 BAR isn't restored sometimes
2019-02-12 9:47 [PATCH v2 0/3] MdeModulePkg/PciBus: Fix a bug PPB MEM32 BAR isn't restored sometimes Ray Ni
` (2 preceding siblings ...)
2019-02-12 9:47 ` [PATCH v2 3/3] MdeModulePkg/PciBus: Fix a bug PPB MEM32 BAR isn't restored sometimes Ray Ni
@ 2019-02-13 6:49 ` Wu, Hao A
3 siblings, 0 replies; 5+ messages in thread
From: Wu, Hao A @ 2019-02-13 6:49 UTC (permalink / raw)
To: Ni, Ray, edk2-devel@lists.01.org
> -----Original Message-----
> From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of
> Ray Ni
> Sent: Tuesday, February 12, 2019 5:48 PM
> To: edk2-devel@lists.01.org
> Subject: [edk2] [PATCH v2 0/3] MdeModulePkg/PciBus: Fix a bug PPB MEM32
> BAR isn't restored sometimes
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1505
>
> v2: fixed all typos in PciBus driver.
> changed RomSize to UINT32 and added type cast to PPB MEM32 BAR
> Base/Length to avoid using RShiftU64().
For the series:
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
Best Regards,
Hao Wu
>
>
> Ray Ni (3):
> MdeModulePkg/PciBus: Change PCI_IO_DEVICE.RomSize to UINT32 type
> MdeModulePkg/PciBus: Correct typos
> MdeModulePkg/PciBus: Fix a bug PPB MEM32 BAR isn't restored
> sometimes
>
> MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h | 4 +-
> MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c | 14 +--
> MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.h | 16 +--
> .../Bus/Pci/PciBusDxe/PciDeviceSupport.c | 20 ++--
> .../Bus/Pci/PciBusDxe/PciDeviceSupport.h | 14 +--
> .../Bus/Pci/PciBusDxe/PciDriverOverride.c | 4 +-
> .../Bus/Pci/PciBusDxe/PciDriverOverride.h | 4 +-
> .../Bus/Pci/PciBusDxe/PciEnumerator.c | 8 +-
> .../Bus/Pci/PciBusDxe/PciEnumerator.h | 8 +-
> .../Bus/Pci/PciBusDxe/PciEnumeratorSupport.c | 42 +++----
> .../Bus/Pci/PciBusDxe/PciEnumeratorSupport.h | 16 +--
> .../Bus/Pci/PciBusDxe/PciHotPlugSupport.c | 16 +--
> .../Bus/Pci/PciBusDxe/PciHotPlugSupport.h | 18 +--
> MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c | 16 +--
> MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.h | 4 +-
> MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 4 +-
> .../Bus/Pci/PciBusDxe/PciOptionRomSupport.c | 6 +-
> .../Bus/Pci/PciBusDxe/PciOptionRomSupport.h | 4 +-
> .../Bus/Pci/PciBusDxe/PciPowerManagement.c | 4 +-
> .../Bus/Pci/PciBusDxe/PciPowerManagement.h | 4 +-
> .../Bus/Pci/PciBusDxe/PciResourceSupport.c | 113 +++++++++---------
> .../Bus/Pci/PciBusDxe/PciResourceSupport.h | 41 ++++---
> MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.h | 7 +-
> 23 files changed, 190 insertions(+), 197 deletions(-)
>
> --
> 2.20.1.windows.1
>
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2019-02-13 6:49 UTC | newest]
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2019-02-12 9:47 [PATCH v2 0/3] MdeModulePkg/PciBus: Fix a bug PPB MEM32 BAR isn't restored sometimes Ray Ni
2019-02-12 9:47 ` [PATCH v2 1/3] MdeModulePkg/PciBus: Change PCI_IO_DEVICE.RomSize to UINT32 type Ray Ni
2019-02-12 9:47 ` [PATCH v2 2/3] MdeModulePkg/PciBus: Correct typos Ray Ni
2019-02-12 9:47 ` [PATCH v2 3/3] MdeModulePkg/PciBus: Fix a bug PPB MEM32 BAR isn't restored sometimes Ray Ni
2019-02-13 6:49 ` [PATCH v2 0/3] " Wu, Hao A
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