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[2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id u17sm10695231wrg.71.2019.02.12.06.59.59 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 12 Feb 2019 06:59:59 -0800 (PST) Date: Tue, 12 Feb 2019 14:59:58 +0000 From: Leif Lindholm To: Ming Huang Cc: linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org, ard.biesheuvel@linaro.org, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, john.garry@huawei.com, xinliang.liu@linaro.org, zhangfeng56@huawei.com Message-ID: <20190212145958.tuie3la5gnrvezef@bivouac.eciton.net> References: <20190201133436.10500-1-ming.huang@linaro.org> <20190201133436.10500-9-ming.huang@linaro.org> <20190211183647.ujmfncqwdevl5i6w@bivouac.eciton.net> <605edcb2-da58-d6d2-0a9a-dd2c292241d7@linaro.org> MIME-Version: 1.0 In-Reply-To: <605edcb2-da58-d6d2-0a9a-dd2c292241d7@linaro.org> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH edk2-platforms v1 08/16] Hisilicon/D06: Change HCCS speed from 30G to 26G X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 12 Feb 2019 15:00:02 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Tue, Feb 12, 2019 at 10:45:05PM +0800, Ming Huang wrote: > > > On 2/12/2019 2:36 AM, Leif Lindholm wrote: > > On Fri, Feb 01, 2019 at 09:34:28PM +0800, Ming Huang wrote: > >> Follow chip team suggestion to change HCCS(Huawei Cache-Coherent > >> System) speed from 30G to 26G, this modification can avoid some > >> unstable stress issue. > >> > >> Contributed-under: TianoCore Contribution Agreement 1.1 > >> Signed-off-by: Ming Huang > >> --- > >> Silicon/Hisilicon/Include/Library/OemMiscLib.h | 10 ++++++++++ > >> Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c | 8 ++++++++ > >> 2 files changed, 18 insertions(+) > >> > >> diff --git a/Silicon/Hisilicon/Include/Library/OemMiscLib.h b/Silicon/Hisilicon/Include/Library/OemMiscLib.h > >> index dfac87d635d9..3c0cd0319122 100644 > >> --- a/Silicon/Hisilicon/Include/Library/OemMiscLib.h > >> +++ b/Silicon/Hisilicon/Include/Library/OemMiscLib.h > >> @@ -22,6 +22,11 @@ > >> #include > >> #include > >> > >> +#define HCCS_PLL_VALUE_3000 0x52240781 > >> +#define HCCS_PLL_VALUE_2600 0x52240681 > >> +#define HCCS_PLL_VALUE_2800 0x52240701 > > > > Could these be described by a proper macro instead of just values? > > A cursory glance suggests that an increase of 0x80 in the lower half > > means 200MHz. > > > > If not, please sort them by frequency, ascending. > > As the macros have use in other files, I prefer sort them by frequency. > > > > >> + > >> + > >> #define PCIEDEVICE_REPORT_MAX 8 > >> #define MAX_PROCESSOR_SOCKETS MAX_SOCKET > >> #define MAX_MEMORY_CHANNELS MAX_CHANNEL > >> @@ -55,4 +60,9 @@ extern EFI_STRING_ID gDimmToDevLocator[MAX_SOCKET][MAX_CHANNEL][MAX_DIMM]; > >> EFI_HII_HANDLE EFIAPI OemGetPackages (); > >> UINTN OemGetCpuFreq (UINT8 Socket); > >> > >> +UINTN > >> +OemGetHccsFreq ( > >> + VOID > >> + ); > >> + > >> #endif > >> diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c > >> index 8f2ac308c7b9..83e53cfeb5dd 100644 > >> --- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c > >> +++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c > >> @@ -223,3 +223,11 @@ UINTN OemGetCpuFreq (UINT8 Socket) > >> } > >> } > >> > >> +UINTN > >> +OemGetHccsFreq ( > > > > The commit message describes this patch as changing the frequency. > > The actual code simply returns a value. > > The name of the function returning this value suggests the value is a > > frequency> > >> + VOID > >> + ) > >> +{ > >> + return HCCS_PLL_VALUE_2600; > > > > But the constant returned is named suggesting a PLL configuration > > value. And the frequency suggested by the name is many orders of > > magnitude below that described by the commit message. > > Yes, the macros and function name are not very matched. > I plan to modify the commit title and message: > Hisilicon/D06: Use HCCS speed with 2.6G > > Follow chip team suggestion, HCCS(Huawei Cache-Coherent System) > may be unstable while speed is 3.0G, so use 2.6G to avoid some > unstable stress issue. This all sounds good, thanks. / Leif