From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::442; helo=mail-pf1-x442.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf1-x442.google.com (mail-pf1-x442.google.com [IPv6:2607:f8b0:4864:20::442]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 5A2D6211CBD17 for ; Tue, 19 Feb 2019 23:29:34 -0800 (PST) Received: by mail-pf1-x442.google.com with SMTP id q17so11478164pfh.10 for ; Tue, 19 Feb 2019 23:29:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=D2GO8YDi/c7moPsk5SNIntPWbx5jh74iUOgZv5Kf+Lc=; b=HdA18iVSqJh/btFAP42GaeeUDTCc1CIG27RQBLWWmdyqeCbk3LBNgWKinc/NCPLj/m ZaSGbOvu71JgGX/kssmfG6MgJ/A9Hh2R7R4NaQ10hbQAlqa9IkWbPNQMiKLmfRFr1Wi9 oUgETndUoluduRFzcWMB/l4wekH7naRdBVKKDvaxgasew8UYY7RKD3m/+2BTB14M60DI N1vNBrc3Zy6JVsr5eDf/djNKQNvLDv7Cf0LiOJ6DzGSArrR8A8+Rp5hINfG+oUqWGE2t VPU3wN29ICiPiTMDrb+jy/UYJVZ8KXBsipm0rLmrf7Xv4nck1OozOiKJMqKddCKtjz6D ntfA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=D2GO8YDi/c7moPsk5SNIntPWbx5jh74iUOgZv5Kf+Lc=; b=jqVHfCVe9OUB0q6vAl8rL5+/uqOOrj2wAK23Aw7rVrff/9p/14hiCUkjochG87WNC0 8d+6G4la9UCQYWmQMB2RP4YY4hsJel3YkSWDsuE8pijtxHTLuZ1brg+QbEuSfGBjhMjR 3xSBPxQQcZRK3YlcMtkSJNVhlB/WDM2ml6VdZ+oNeaNVw3/LmFGMdKaTW+z3bHF9+Lt2 HfXnzhxrGGUC/A54cUhUWTmSqZNItrtlyJF9gkOat78rnT0J+q32FeV4TjBDvNxtVpPN m/1+pQ9/gsxvZOGvQyHJGIyo5wKq5E8Fdlwd952gZkJwr9hpbC3c7FDMLBsdlDn2L0yv Z33Q== X-Gm-Message-State: AHQUAuaDw7uIyWDTjO9XzqFxF/3ErcIs6bXbDZIpYOP3PrQKDles23rk JQL05K4s++DugISqAD9Q5XLOgg== X-Google-Smtp-Source: AHgI3IZB7nF9RWbjB8N1oaWGXbD1MwNlozdG/DNGd7aZMCkvgG9RWjiRYAhxdLogDy2I+5tknV6NhQ== X-Received: by 2002:a63:2004:: with SMTP id g4mr162554pgg.337.1550647774048; Tue, 19 Feb 2019 23:29:34 -0800 (PST) Received: from localhost.localdomain ([203.160.91.226]) by smtp.gmail.com with ESMTPSA id 23sm19152969pft.187.2019.02.19.23.29.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 19 Feb 2019 23:29:33 -0800 (PST) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Cc: ard.biesheuvel@linaro.org, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, john.garry@huawei.com, zhangfeng56@huawei.com, xiaojun2@hisilicon.com, Ming Huang Date: Wed, 20 Feb 2019 15:28:34 +0800 Message-Id: <20190220072837.35058-16-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190220072837.35058-1-ming.huang@linaro.org> References: <20190220072837.35058-1-ming.huang@linaro.org> Subject: [PATCH edk2-platforms v2 15/18] Hisilicon/D06: Fix USB crash issue(4079) X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 20 Feb 2019 07:29:34 -0000 Last patch "Modify IORT" change revision id of node type 2 to 1, and 4.19 later kernel will judge the revision id to get root pci bridge DMA informations from IORT. As Hi1620 USB 2.0 don't support 64 bit DMA, but the DMA attribute get from IORT node type 2 is 64 bit. So add _DMA method in USB pci bridge 3 and pci bridge 8 to fix usb crash when usb device is present issue. https://bugs.linaro.org/show_bug.cgi?id=4079 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 46 ++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl index 6dc380f27fa2..c1083dc16a2a 100644 --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl @@ -375,6 +375,29 @@ Device (PCI2) PCI_OSC_SUPPORT () + Method(_DMA, 0, Serialized) + { + Return (ResourceTemplate() + { + QWORDMemory( + ResourceConsumer, + PosDecode, // _DEC + MinFixed, // _MIF + MaxFixed, // _MAF + Prefetchable, // _MEM + ReadWrite, // _RW + 0, // _GRA + 0x00000000, // _MIN + 0xFFFFFFFF, // _MAX + 0x00000000, // _TRA + 0x100000000, // _LEN + , + , + , + ) + }) + } + Method (_STA, 0x0, NotSerialized) { Return (0xf) @@ -1077,6 +1100,29 @@ Device (PCI8) Return (0xf) } + Method(_DMA, 0, Serialized) + { + Return (ResourceTemplate() + { + QWORDMemory( + ResourceConsumer, + PosDecode, // _DEC + MinFixed, // _MIF + MaxFixed, // _MAF + Prefetchable, // _MEM + ReadWrite, // _RW + 0, // _GRA + 0x00000000, // _MIN + 0xFFFFFFFF, // _MAX + 0x00000000, // _TRA + 0x100000000, // _LEN + , + , + , + ) + }) + } + Method (_PXM, 0, NotSerialized) { Return(0x02) -- 2.9.5