From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::443; helo=mail-pf1-x443.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf1-x443.google.com (mail-pf1-x443.google.com [IPv6:2607:f8b0:4864:20::443]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 3DE74211BD5E6 for ; Tue, 19 Feb 2019 23:29:01 -0800 (PST) Received: by mail-pf1-x443.google.com with SMTP id v21so8479727pfm.12 for ; Tue, 19 Feb 2019 23:29:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=MRbvcU1OuLk38U6fCDZjzxsbaCDVrdkPV7fJkZKzkjo=; b=hp1F+pIU9U+83r15Mshzr9dMvMSkEuq3OxayDhMqUFN8Ft2MDY1T3nq7q+EJuJR/ET yaf/QL1YXwMe+CChVMkr/X9kuMTbIUKmjw4qTbsck/dGa2P9yh6o2gWayfc5zPMJK3bn A2cI6oXu1T/mz2WjzY/bvn5NY//37JgJlIBh+kQwxBUqJFWRhGj9pux5d2yVQaGP4sn8 MzVm3o1iedefnGePdvDFtd5tHbu9BLTaHNOuIOxKJsY+0fFQIOQVhltojlDrPCuMEg/5 hmrcrMfTsR7Kz8eRlhBRstSGDJkU9PAo1gQdaEslToTFGva3Ob/3n3f8hchJP6shePgD l8Wg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=MRbvcU1OuLk38U6fCDZjzxsbaCDVrdkPV7fJkZKzkjo=; b=c95OYZELK9GE04NGOfRSk6/OONQTAEQ/d5uzosKp0Q/MsUnIOxOO8DehEpGlCp2QSb EGBZFysSsTSPpSODa1aJn//UcWVuVYyAfkUcoC66n5DWHFv3L4gQrJZjArS28k6W+plN uPvo0o4yZbJnQNd7Iyc4FJu798w8Cj4IoR1saGzcTaQ6hfSWlOs/ssVVbp3aSik0SsOQ 6ICoJLP9DN4cHpB6aouZYoUhZSqWKCxQejGtrfAw7buEtkNxiZwdg8sIGwz15wFmBVG3 BWKGOJuOIyj+qpM6is4ylDn/DI70DJ9+osRM6+KJXphaFgbjLz28snWHAjnR4isTxnUA zkVg== X-Gm-Message-State: AHQUAuZVzx1f+q9FCojhrCHRPOdKGKe3SmuBjYTW5NPCPtq+vA3M2bdA A6y++kjtbj72wUo+Zfsua+Tzhg== X-Google-Smtp-Source: AHgI3IYprHi4k8FjZcXomO99zkDC7qQ1AzG0FGpIDzG4/MgJU72vuLT6s8uXYvtgeZ33uGN8YtUB7Q== X-Received: by 2002:a63:7044:: with SMTP id a4mr27411002pgn.359.1550647740935; Tue, 19 Feb 2019 23:29:00 -0800 (PST) Received: from localhost.localdomain ([203.160.91.226]) by smtp.gmail.com with ESMTPSA id 23sm19152969pft.187.2019.02.19.23.28.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 19 Feb 2019 23:29:00 -0800 (PST) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Cc: ard.biesheuvel@linaro.org, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, john.garry@huawei.com, zhangfeng56@huawei.com, xiaojun2@hisilicon.com, Ming Huang Date: Wed, 20 Feb 2019 15:28:24 +0800 Message-Id: <20190220072837.35058-6-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190220072837.35058-1-ming.huang@linaro.org> References: <20190220072837.35058-1-ming.huang@linaro.org> Subject: [PATCH edk2-platforms v2 05/18] Hisilicon/D06: Add more PCIe port INT-x support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 20 Feb 2019 07:29:01 -0000 Since NVMe riser width is 6*X4, need add the related port's INT-x support to match OS driver. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 37 +++++++++++++++++++- 1 file changed, 36 insertions(+), 1 deletion(-) diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl index 0f2d11bb952b..4d9d9d95be68 100644 --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl @@ -41,11 +41,21 @@ Scope(_SB) // adding RPx INTx configure deponds on hardware board topology, // if UEFI enables RPx, RPy, RPz... related INTx configure // should be added + Package () {0x2FFFF,0,0,640}, // INT_A + Package () {0x2FFFF,1,0,641}, // INT_B + Package () {0x2FFFF,2,0,642}, // INT_C + Package () {0x2FFFF,3,0,643}, // INT_D + Package () {0x4FFFF,0,0,640}, // INT_A Package () {0x4FFFF,1,0,641}, // INT_B Package () {0x4FFFF,2,0,642}, // INT_C Package () {0x4FFFF,3,0,643}, // INT_D + Package () {0x6FFFF,0,0,640}, // INT_A + Package () {0x6FFFF,1,0,641}, // INT_B + Package () {0x6FFFF,2,0,642}, // INT_C + Package () {0x6FFFF,3,0,643}, // INT_D + Package () {0x8FFFF,0,0,640}, // INT_A Package () {0x8FFFF,1,0,641}, // INT_B Package () {0x8FFFF,2,0,642}, // INT_C @@ -56,6 +66,11 @@ Scope(_SB) Package () {0xCFFFF,2,0,642}, // INT_C Package () {0xCFFFF,3,0,643}, // INT_D + Package () {0xEFFFF,0,0,640}, // INT_A + Package () {0xEFFFF,1,0,641}, // INT_B + Package () {0xEFFFF,2,0,642}, // INT_C + Package () {0xEFFFF,3,0,643}, // INT_D + Package () {0x10FFFF,0,0,640}, // INT_A Package () {0x10FFFF,1,0,641}, // INT_B Package () {0x10FFFF,2,0,642}, // INT_C @@ -759,11 +774,21 @@ Device (PCI6) // adding RPx INTx configure deponds on hardware board topology, // if UEFI enables RPx, RPy, RPz... related INTx configure // should be added + Package () {0x2FFFF,0,0,640}, // INT_A + Package () {0x2FFFF,1,0,641}, // INT_B + Package () {0x2FFFF,2,0,642}, // INT_C + Package () {0x2FFFF,3,0,643}, // INT_D + Package () {0x4FFFF,0,0,640}, // INT_A Package () {0x4FFFF,1,0,641}, // INT_B Package () {0x4FFFF,2,0,642}, // INT_C Package () {0x4FFFF,3,0,643}, // INT_D + Package () {0x6FFFF,0,0,640}, // INT_A + Package () {0x6FFFF,1,0,641}, // INT_B + Package () {0x6FFFF,2,0,642}, // INT_C + Package () {0x6FFFF,3,0,643}, // INT_D + Package () {0x8FFFF,0,0,640}, // INT_A Package () {0x8FFFF,1,0,641}, // INT_B Package () {0x8FFFF,2,0,642}, // INT_C @@ -774,11 +799,21 @@ Device (PCI6) Package () {0xCFFFF,2,0,642}, // INT_C Package () {0xCFFFF,3,0,643}, // INT_D + Package () {0xEFFFF,0,0,640}, // INT_A + Package () {0xEFFFF,1,0,641}, // INT_B + Package () {0xEFFFF,2,0,642}, // INT_C + Package () {0xEFFFF,3,0,643}, // INT_D + Package () {0x10FFFF,0,0,640}, // INT_A Package () {0x10FFFF,1,0,641}, // INT_B Package () {0x10FFFF,2,0,642}, // INT_C Package () {0x10FFFF,3,0,643}, // INT_D - }) + + Package () {0x12FFFF,0,0,640}, // INT_A + Package () {0x12FFFF,1,0,641}, // INT_B + Package () {0x12FFFF,2,0,642}, // INT_C + Package () {0x12FFFF,3,0,643}, // INT_D + }) Method (_CRS, 0, Serialized) { // Root complex resources, _CRS: current resource setting Name (RBUF, ResourceTemplate () { // Name: 19.6.87, ResourceTemplate: 19.6.111, -- 2.9.5