From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.136; helo=mga12.intel.com; envelope-from=shenglei.zhang@intel.com; receiver=edk2-devel@lists.01.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 1CB19211CD9BD for ; Mon, 4 Mar 2019 17:41:11 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 Mar 2019 17:41:11 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.58,442,1544515200"; d="scan'208";a="325428096" Received: from shenglei-dev.ccr.corp.intel.com ([10.239.158.52]) by fmsmga005.fm.intel.com with ESMTP; 04 Mar 2019 17:41:10 -0800 From: Shenglei Zhang To: edk2-devel@lists.01.org Cc: Michael D Kinney , Liming Gao Date: Tue, 5 Mar 2019 09:40:58 +0800 Message-Id: <20190305014059.17988-3-shenglei.zhang@intel.com> X-Mailer: git-send-email 2.18.0.windows.1 In-Reply-To: <20190305014059.17988-1-shenglei.zhang@intel.com> References: <20190305014059.17988-1-shenglei.zhang@intel.com> Subject: [PATCH 2/3] MdePkg/BaseLib: Remove inline X86 assembly code X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 05 Mar 2019 01:41:11 -0000 MdePkg BaseLib still uses the inline X86 assembly code in C code files.It should be updated to consume nasm only. https://bugzilla.tianocore.org/show_bug.cgi?id=1163 Cc: Michael D Kinney Cc: Liming Gao Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Shenglei Zhang --- MdePkg/Library/BaseLib/BaseLib.inf | 27 --------------------------- 1 file changed, 27 deletions(-) diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf index a0d6c372f9..80e312fb34 100644 --- a/MdePkg/Library/BaseLib/BaseLib.inf +++ b/MdePkg/Library/BaseLib/BaseLib.inf @@ -555,26 +555,8 @@ Math64.c | RVCT Math64.c | MSFT - Arm/SwitchStack.asm | RVCT - Arm/SetJumpLongJump.asm | RVCT - Arm/DisableInterrupts.asm | RVCT - Arm/EnableInterrupts.asm | RVCT - Arm/GetInterruptsState.asm | RVCT - Arm/CpuPause.asm | RVCT - Arm/CpuBreakpoint.asm | RVCT - Arm/MemoryFence.asm | RVCT Arm/SpeculationBarrier.S | RVCT - Arm/SwitchStack.asm | MSFT - Arm/SetJumpLongJump.asm | MSFT - Arm/DisableInterrupts.asm | MSFT - Arm/EnableInterrupts.asm | MSFT - Arm/GetInterruptsState.asm | MSFT - Arm/CpuPause.asm | MSFT - Arm/CpuBreakpoint.asm | MSFT - Arm/MemoryFence.asm | MSFT - Arm/SpeculationBarrier.asm | MSFT - Arm/Math64.S | GCC Arm/SwitchStack.S | GCC Arm/EnableInterrupts.S | GCC @@ -599,15 +581,6 @@ AArch64/CpuBreakpoint.S | GCC AArch64/SpeculationBarrier.S | GCC - AArch64/MemoryFence.asm | MSFT - AArch64/SwitchStack.asm | MSFT - AArch64/EnableInterrupts.asm | MSFT - AArch64/DisableInterrupts.asm | MSFT - AArch64/GetInterruptsState.asm | MSFT - AArch64/SetJumpLongJump.asm | MSFT - AArch64/CpuBreakpoint.asm | MSFT - AArch64/SpeculationBarrier.asm | MSFT - [Packages] MdePkg/MdePkg.dec -- 2.18.0.windows.1