From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.88; helo=mga01.intel.com; envelope-from=narendra.k.vanguput@intel.com; receiver=edk2-devel@lists.01.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id B2F55211D56C9 for ; Mon, 18 Mar 2019 01:47:57 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 18 Mar 2019 01:47:57 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.58,493,1544515200"; d="scan'208";a="135218508" Received: from nkvangup-desk4.gar.corp.intel.com ([10.223.18.122]) by fmsmga007.fm.intel.com with ESMTP; 18 Mar 2019 01:47:55 -0700 From: nkvangup To: edk2-devel@lists.01.org Cc: Vanguput Narendra K , Eric Dong , Ray Ni , Laszlo Ersek , Yao Jiewen Date: Mon, 18 Mar 2019 14:17:47 +0530 Message-Id: <20190318084747.5900-1-narendra.k.vanguput@intel.com> X-Mailer: git-send-email 2.16.2.windows.1 Subject: [PATCH v3] UefiCpuPkg\CpuSmm: Save & restore CR2 on-demand paging in SMM X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 18 Mar 2019 08:47:57 -0000 BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1593 For every SMI occurrence, save and restore CR2 register only when SMM on-demand paging support is enabled in 64 bit operation mode. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Vanguput Narendra K Cc: Eric Dong Cc: Ray Ni Cc: Laszlo Ersek Cc: Yao Jiewen --- ...CpuSmm-Save-restore-CR2-on-demand-paging-.patch | 62 ++++++++++++++++++++++ UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 22 +++++--- UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 2 +- 3 files changed, 77 insertions(+), 9 deletions(-) create mode 100644 0001-UefiCpuPkg-CpuSmm-Save-restore-CR2-on-demand-paging-.patch diff --git a/0001-UefiCpuPkg-CpuSmm-Save-restore-CR2-on-demand-paging-.patch b/0001-UefiCpuPkg-CpuSmm-Save-restore-CR2-on-demand-paging-.patch new file mode 100644 index 0000000000..92f5ea0f4f --- /dev/null +++ b/0001-UefiCpuPkg-CpuSmm-Save-restore-CR2-on-demand-paging-.patch @@ -0,0 +1,62 @@ +From 793ab6bf9facbdcd34f4a1e8ccdfdbd1657f594e Mon Sep 17 00:00:00 2001 +From: nkvangup +Date: Tue, 5 Mar 2019 22:43:42 +0530 +Subject: [PATCH v2] UefiCpuPkg\CpuSmm: Save & restore CR2 on-demand paging in + SMM + +BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1593 + +For every SMI occurrence, save and restore CR2 register only when SMM +on-demand paging support is enabled in 64 bit operation mode. + +Contributed-under: TianoCore Contribution Agreement 1.1 +Signed-off-by: Vanguput Narendra K +Cc: Eric Dong +Cc: Ray Ni +Cc: Laszlo Ersek +Cc: Yao Jiewen +--- + UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 20 ++++++++++++-------- + 1 file changed, 12 insertions(+), 8 deletions(-) + +diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c +index 3b0b3b52ac..5be4a2b020 100644 +--- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c ++++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c +@@ -1111,10 +1111,12 @@ SmiRendezvous ( + + ASSERT(CpuIndex < mMaxNumberOfCpus); + +- // +- // Save Cr2 because Page Fault exception in SMM may override its value +- // +- Cr2 = AsmReadCr2 (); ++ if ((sizeof (UINTN) == sizeof (UINT64)) && (!PcdGetBool (PcdCpuSmmStaticPageTable))) { ++ // ++ // Save Cr2 because Page Fault exception in SMM may override its value ++ // ++ Cr2 = AsmReadCr2 (); ++ } + + // + // Perform CPU specific entry hooks +@@ -1253,10 +1255,12 @@ SmiRendezvous ( + + Exit: + SmmCpuFeaturesRendezvousExit (CpuIndex); +- // +- // Restore Cr2 +- // +- AsmWriteCr2 (Cr2); ++ if ((sizeof (UINTN) == sizeof (UINT64)) && (!PcdGetBool (PcdCpuSmmStaticPageTable))) { ++ // ++ // Restore Cr2 ++ // ++ AsmWriteCr2 (Cr2); ++ } + } + + /** +-- +2.16.2.windows.1 + diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c index 3b0b3b52ac..5e3a39a234 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c @@ -28,6 +28,7 @@ UINTN mSemaphoreSize; SPIN_LOCK *mPFLock = NULL; SMM_CPU_SYNC_MODE mCpuSmmSyncMode; BOOLEAN mMachineCheckSupported = FALSE; +BOOLEAN mCpuSmmStaticPageTable = TRUE; /** Performs an atomic compare exchange operation to get semaphore. @@ -1111,10 +1112,13 @@ SmiRendezvous ( ASSERT(CpuIndex < mMaxNumberOfCpus); - // - // Save Cr2 because Page Fault exception in SMM may override its value - // - Cr2 = AsmReadCr2 (); + if (!mCpuSmmStaticPageTable) { + // + // Save and restore Cr2 when using on-demand paging for above 4G memory because Page Fault + // exception in SMM may override its value + // + Cr2 = AsmReadCr2 (); + } // // Perform CPU specific entry hooks @@ -1253,10 +1257,12 @@ SmiRendezvous ( Exit: SmmCpuFeaturesRendezvousExit (CpuIndex); - // - // Restore Cr2 - // - AsmWriteCr2 (Cr2); + if (!mCpuSmmStaticPageTable) { + // + // Restore Cr2 + // + AsmWriteCr2 (Cr2); + } } /** diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c index 2c77cb47a4..e444b8a031 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c @@ -21,7 +21,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. LIST_ENTRY mPagePool = INITIALIZE_LIST_HEAD_VARIABLE (mPagePool); BOOLEAN m1GPageTableSupport = FALSE; -BOOLEAN mCpuSmmStaticPageTable; +extern BOOLEAN mCpuSmmStaticPageTable; /** Disable CET. -- 2.16.2.windows.1