From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::541; helo=mail-pg1-x541.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pg1-x541.google.com (mail-pg1-x541.google.com [IPv6:2607:f8b0:4864:20::541]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 7F118211E0105 for ; Wed, 20 Mar 2019 01:08:41 -0700 (PDT) Received: by mail-pg1-x541.google.com with SMTP id u9so1206641pgo.7 for ; Wed, 20 Mar 2019 01:08:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=W4klSxcc5gYRTErEvNXERpCKxMxZSSOqhrsRFybP+6o=; b=CiP4oASSPSo+yNCVJTFa/aBBbWtmjEp/Yh1xQNYU2L+qTh8u3FkB+xCHeQYuyQz/7H seHXe5s02Zdgf18LbmN/pkD/WD8wEDZKlRSEu2SQ5tFPiOEUezAYiu9qenApgLYoRQny u/0rQMdcWc4+sGHwnGT1HAufBG84XuYz2QpgmrWtfXOG7oAEafscsjhoGpxCHwmHVP7I YUbidb6yj3A+cdxq05XlRSD/2gR+BKxu0B1N9pHQs/hHAYvUO+jv+b2zR+iSAMYbfRWi hbxYtEjSi+5NYQZK91HYLz7755HdcogMuRqJxGxGq92L5BmIL1C9X6aG83hwwweY062p mXdw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=W4klSxcc5gYRTErEvNXERpCKxMxZSSOqhrsRFybP+6o=; b=lmi/TxfHgKpe8FdSw6Ks8l0qz2TbiQ85HBEbttWyeHKoQ1jnmP3gbHwPJXEdV2v+X7 BW60ofKT0cHFnzJs9FPT9prhJ/FeYI/THYaqng/HYXxcsgAK2xxgv30QZ01TjCfRseVP CkAz2GmUQbVMKJBRJZ/DapEzvHS4dNMyy9//a5zUgXAMb0fHj/kStaE2pqhD04VnCwZH D9Y3YiD29gX6Kk/E9AOh8NUVhCH1AwLjPvYMmMgLXmF5E9RBjR8oHN6vxi9UK/igtS4j 9UoB1vrsXRvFctcHzl1rPFV6OBwkC4ZfWjtkS3fY4XWAVhLB48TdAOmx/dHrnD9cfYjZ arag== X-Gm-Message-State: APjAAAUHzECSe1jODJczFl8bKu0+1EgpNzICpsojIUzPgEV/w++xgo5O hDmLd/x3Feu3imQxqvUPwpf9QA== X-Google-Smtp-Source: APXvYqzaQ3dyf9ZJU8oCUiYTRjcWU3Wxy0ei5T0TN1BnJRzOn1Jr8M+1aa1w/5iHiUcFDum0D+oYjQ== X-Received: by 2002:a17:902:1002:: with SMTP id b2mr6430404pla.248.1553069320953; Wed, 20 Mar 2019 01:08:40 -0700 (PDT) Received: from localhost.localdomain ([203.160.91.226]) by smtp.gmail.com with ESMTPSA id f9sm1602796pfd.10.2019.03.20.01.08.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 20 Mar 2019 01:08:40 -0700 (PDT) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Cc: ard.biesheuvel@linaro.org, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, john.garry@huawei.com, zhangfeng56@huawei.com, xiaojun2@hisilicon.com, Ming Huang Date: Wed, 20 Mar 2019 16:08:11 +0800 Message-Id: <20190320080829.52003-1-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 Subject: [PATCH edk2-platforms v3 00/18] Fix issues and improve D0x X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 20 Mar 2019 08:08:41 -0000 Main Changes since v2 : 1 Move tidy and delete header file patch to the first of the series. Code can also be found in github: https://github.com/hisilicon/OpenPlatformPkg.git branch: 1902-platforms-v3 Jason Zhang (1): Hisilicon/D06: Fix access variable fail issue Ming Huang (16): Hisilicon/D0x: Remove and tidy some codes about SerdesLib Hisilicon/D0x: Delete some header files Hisilicon/D0x: Add DriverHealthManagerDxe Hisilicon/D06: Optimize SAS driver for reducing boot time Hisilicon/D06: Drop the leading 0 (0x0 -> 0x) Hisilicon/D06: Add more PCIe port INT-x support Hisilicon/D0x: Rename StartupAp() function Hisilicon/D06: Use HCCS speed with 2.6G Hisilicon/D06: Add PCI_OSC_SUPPORT Hisilicon/D06: Modify for IMP self-Adapte support Hisilicon/D06: Add Setup Item "Support DPC" and delete some PCIe menus Hisilicon/D06: Use new flash layout Hisilicon/D06: Remove SECURE_BOOT_ENABLE definition Hisilicon/D0x: Remove SP805 watchdog pcd Hisilicon/D06: Fix USB crash issue(4079) Hisilicon/D0x: Modify version to 19.02 xingjiang tang (1): Hisilicon/D06: Add OemGetCpuFreq to encapsulate difference Platform/Hisilicon/D03/D03.dsc | 8 +- Platform/Hisilicon/D05/D05.dsc | 8 +- Platform/Hisilicon/D06/D06.dsc | 19 +- Platform/Hisilicon/D03/D03.fdf | 1 + Platform/Hisilicon/D05/D05.fdf | 1 + Platform/Hisilicon/D06/D06.fdf | 18 +- Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.inf | 1 + Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf | 2 +- Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf | 1 + Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf | 1 + Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf | 1 + Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf | 1 + Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClassDxe.inf | 1 + Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf | 1 + Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf | 4 +- Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.inf | 1 + Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.inf | 1 + Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf | 1 - Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf | 1 + Silicon/Hisilicon/Library/I2CLib/I2CLib.inf | 1 + Silicon/Hisilicon/Library/I2CLib/I2CLibRuntime.inf | 1 + Platform/Hisilicon/D06/Include/Library/CpldD06.h | 4 + Silicon/Hisilicon/Hi1610/Include/Library/SerdesLib.h | 131 --------- Silicon/Hisilicon/Hi1616/Include/Library/SerdesLib.h | 86 ------ Silicon/Hisilicon/Hi1620/Include/Library/SerdesLib.h | 85 ------ Silicon/Hisilicon/Include/Library/IpmiCmdLib.h | 110 ------- Silicon/Hisilicon/Include/Library/LpcLib.h | 113 ------- Silicon/Hisilicon/Include/Library/OemAddressMapLib.h | 45 --- Silicon/Hisilicon/Include/Library/OemConfigData.h | 1 + Silicon/Hisilicon/Include/Library/OemMiscLib.h | 75 +++++ Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h | 112 ------- Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr | 4 +- Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c | 2 +- Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c | 1 - Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c | 2 +- Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c | 2 +- Platform/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c | 1 - Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c | 3 +- Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c | 2 +- Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c | 1 - Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c | 25 +- Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c | 281 ++++-------------- Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c | 2 +- Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c | 6 +- Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 311 +++++++++++++------- Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr | 197 +------------ Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni | 3 +- 47 files changed, 408 insertions(+), 1271 deletions(-) delete mode 100755 Silicon/Hisilicon/Hi1610/Include/Library/SerdesLib.h delete mode 100644 Silicon/Hisilicon/Hi1616/Include/Library/SerdesLib.h delete mode 100644 Silicon/Hisilicon/Hi1620/Include/Library/SerdesLib.h delete mode 100644 Silicon/Hisilicon/Include/Library/IpmiCmdLib.h delete mode 100755 Silicon/Hisilicon/Include/Library/LpcLib.h delete mode 100644 Silicon/Hisilicon/Include/Library/OemAddressMapLib.h delete mode 100644 Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h -- 2.9.5