From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::442; helo=mail-pf1-x442.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf1-x442.google.com (mail-pf1-x442.google.com [IPv6:2607:f8b0:4864:20::442]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 69DD9211E0927 for ; Wed, 20 Mar 2019 01:10:27 -0700 (PDT) Received: by mail-pf1-x442.google.com with SMTP id 9so1101605pfj.13 for ; Wed, 20 Mar 2019 01:10:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=D2GO8YDi/c7moPsk5SNIntPWbx5jh74iUOgZv5Kf+Lc=; b=V3pPfgYQgISA3Ne9NTmVc8L+xmzSWSOVHyq46t2SVoiM6Q29Jv9S3iirbF5Q2nwdBG 6ciIAL08krubhrQRceNOoI25s8epoEVaGn5K1PHp8goEEBvMywtHfPYNsRxRFACLNILE lSlJbBpvL23FWcU+aY1sY/6wV8BGE4Iy14Yey2n8278a0qTz+VylrF/idmKRZ6PhkPFk 1OxKJO8yiQVZ7wN29J0v3Ns92/egN8TsY813K19O5VjhsIrzFNrEHp5JRhN8GalY3OEB fe36Bi+0qYffi9CHCDxtP6+Gm+GmrcdUY3sENe8mwVknt0r1kY3gw/vJgdkGM9NxeO3N zadA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=D2GO8YDi/c7moPsk5SNIntPWbx5jh74iUOgZv5Kf+Lc=; b=oERCtPg/QU6oYaKhW/E51tnPzBm4WDRCz4gK8nYh38RPMgo87kXIuImF2+16H6EKU0 hkazAptqUnXyILVTJe27xxbFRMXOOBodzjJWbieW1Fh6lhP+QFxode3ZM0li1fA/NnX5 5ROGGLDxL3NnUK9HLdTkZIZcDlHChBZXi1H807kmpOlUM72igeHN/xY5HcgAbNsVAkt1 bJ4oNKAB4fQysIXfF5qfSjOeJNFJh70XrlnZ6LuwqEXDdCrJnoZcgbnaBNKCtHha6gI/ KFeK4Sf+NgUnlFyO4nfzsbCqZd75BqNcogWnPQLN0PNzvkH35odZJWMT++Z2VYW0480s Ggpw== X-Gm-Message-State: APjAAAUbIiUWwW16eqAa6AndMjYlNbJEtTIZpUCXkKSJLEW69IhEmtQL qn45u6iMInv46pI34R1Mzjo/3Q== X-Google-Smtp-Source: APXvYqxXrp+8PQJlg8+e7mxaBE7EXyxRNzTmvCnpVYrv77pv77dQ4W7zgH22S8Nac9NkKsJR6Gfxlw== X-Received: by 2002:a63:4542:: with SMTP id u2mr6042556pgk.291.1553069427137; Wed, 20 Mar 2019 01:10:27 -0700 (PDT) Received: from localhost.localdomain ([203.160.91.226]) by smtp.gmail.com with ESMTPSA id f9sm1602796pfd.10.2019.03.20.01.10.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 20 Mar 2019 01:10:26 -0700 (PDT) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Cc: ard.biesheuvel@linaro.org, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, john.garry@huawei.com, zhangfeng56@huawei.com, xiaojun2@hisilicon.com, Ming Huang Date: Wed, 20 Mar 2019 16:08:28 +0800 Message-Id: <20190320080829.52003-18-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190320080829.52003-1-ming.huang@linaro.org> References: <20190320080829.52003-1-ming.huang@linaro.org> Subject: [PATCH edk2-platforms v3 17/18] Hisilicon/D06: Fix USB crash issue(4079) X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 20 Mar 2019 08:10:27 -0000 Last patch "Modify IORT" change revision id of node type 2 to 1, and 4.19 later kernel will judge the revision id to get root pci bridge DMA informations from IORT. As Hi1620 USB 2.0 don't support 64 bit DMA, but the DMA attribute get from IORT node type 2 is 64 bit. So add _DMA method in USB pci bridge 3 and pci bridge 8 to fix usb crash when usb device is present issue. https://bugs.linaro.org/show_bug.cgi?id=4079 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 46 ++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl index 6dc380f27fa2..c1083dc16a2a 100644 --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl @@ -375,6 +375,29 @@ Device (PCI2) PCI_OSC_SUPPORT () + Method(_DMA, 0, Serialized) + { + Return (ResourceTemplate() + { + QWORDMemory( + ResourceConsumer, + PosDecode, // _DEC + MinFixed, // _MIF + MaxFixed, // _MAF + Prefetchable, // _MEM + ReadWrite, // _RW + 0, // _GRA + 0x00000000, // _MIN + 0xFFFFFFFF, // _MAX + 0x00000000, // _TRA + 0x100000000, // _LEN + , + , + , + ) + }) + } + Method (_STA, 0x0, NotSerialized) { Return (0xf) @@ -1077,6 +1100,29 @@ Device (PCI8) Return (0xf) } + Method(_DMA, 0, Serialized) + { + Return (ResourceTemplate() + { + QWORDMemory( + ResourceConsumer, + PosDecode, // _DEC + MinFixed, // _MIF + MaxFixed, // _MAF + Prefetchable, // _MEM + ReadWrite, // _RW + 0, // _GRA + 0x00000000, // _MIN + 0xFFFFFFFF, // _MAX + 0x00000000, // _TRA + 0x100000000, // _LEN + , + , + , + ) + }) + } + Method (_PXM, 0, NotSerialized) { Return(0x02) -- 2.9.5