From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::442; helo=mail-pf1-x442.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf1-x442.google.com (mail-pf1-x442.google.com [IPv6:2607:f8b0:4864:20::442]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 270EF211E010C for ; Wed, 20 Mar 2019 01:09:29 -0700 (PDT) Received: by mail-pf1-x442.google.com with SMTP id v64so1365220pfb.1 for ; Wed, 20 Mar 2019 01:09:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=k1V6hzpPybG54f/e6nZ95Pi12w1ONqa2XY+DvcTgtak=; b=aUidOURU2rXtEJqYyAX62Fb/v8fiXDOEzoDaP+HD52vZXIywAsTuMglkgC32ObsS1t 8Wbpbkew9azUGLK+x9ONTtu9lng0PcuprjvzQ95cSn4nWZwRaWilsblOcK3iQ/npX54C ePhoXK5vFgGnEF/yWCaIkPYh8i5AgIi8jhX7O/5ggVZt3Q0J1zJMQAyjJm/KblJaqkZ1 56haaAvBKsDoeC4H99IwDGFToKC525Lk0EVFqzlVKMoEd4U4fLYU4W5cMBwCj2d2eiTr 7efdU1TuzebEzF0WXhcgojHkWSHTETvqUkKHJl1o7TbwQKFLAPN04ohHgBKfRKYIrWn1 IfDA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=k1V6hzpPybG54f/e6nZ95Pi12w1ONqa2XY+DvcTgtak=; b=O+eL6O0IqN6dlKyPFiItj4dXiRpP9eGvYw2W6FhGJY/oltjMsd5JtCDnDwsZYJr5+I G2Syl1rHMoYMtoUjNZ58Jyhz32dLgXwAq0u6kfc4vCAsfAbQPJjdTXcXY6QMMErgMAss AhZ2SIJ8UGCMxMW+00WiuvlcGCl3tSpsdKzKCM5B+fljLVE6F4cmde10S2TMfFu+HWoJ wKWQNwDghoveDgsVEgBaXCfHh4JfUY/DN8lSnrl3k4xMxumVnoCG87KacBR28+LQ5leO dEd9jpFU+vtffeso5CHMvI8IFJGTpJN55RrE1hqehAeLQ3/cAClSyew4Fq4q8nRRaVnh 1o8g== X-Gm-Message-State: APjAAAWvglZXrcICWKnjMJOTyrWmBVJu09QnQLT/d99P6LZZAPsGhkwU kEkd0ksJIaHPBvmlpARSWihUVw== X-Google-Smtp-Source: APXvYqyYsybzySp/jbYEogSgcCn67DvD3G6B8EagqLaNMlOcUn2Qd70lvkw1OkV+TWXAPkfHrii9kQ== X-Received: by 2002:a65:4203:: with SMTP id c3mr6620166pgq.271.1553069368724; Wed, 20 Mar 2019 01:09:28 -0700 (PDT) Received: from localhost.localdomain ([203.160.91.226]) by smtp.gmail.com with ESMTPSA id f9sm1602796pfd.10.2019.03.20.01.09.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 20 Mar 2019 01:09:28 -0700 (PDT) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Cc: ard.biesheuvel@linaro.org, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, john.garry@huawei.com, zhangfeng56@huawei.com, xiaojun2@hisilicon.com, xingjiang tang , Ming Huang Date: Wed, 20 Mar 2019 16:08:19 +0800 Message-Id: <20190320080829.52003-9-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190320080829.52003-1-ming.huang@linaro.org> References: <20190320080829.52003-1-ming.huang@linaro.org> Subject: [PATCH edk2-platforms v3 08/18] Hisilicon/D06: Add OemGetCpuFreq to encapsulate difference X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 20 Mar 2019 08:09:29 -0000 From: xingjiang tang Implementation OemGetCpuFreq() to get cpu frequency from cpld to encapsulate project difference, for some projects don't support get cpu frequency by this way. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Platform/Hisilicon/D06/Include/Library/CpldD06.h | 4 ++++ Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c | 16 ++++++++++++++++ 2 files changed, 20 insertions(+) diff --git a/Platform/Hisilicon/D06/Include/Library/CpldD06.h b/Platform/Hisilicon/D06/Include/Library/CpldD06.h index ec9b49f4e70d..8eb333de529c 100644 --- a/Platform/Hisilicon/D06/Include/Library/CpldD06.h +++ b/Platform/Hisilicon/D06/Include/Library/CpldD06.h @@ -36,4 +36,8 @@ #define CPLD_X8_X8_X8_BOARD_ID 0x92 #define CPLD_X16_X8_BOARD_ID 0x93 +#define CPLD_CLOCK_FLAG 0xFD +#define CPLD_BOM_VER_FLAG 0x0B +#define CPLD_BOARD_REVISION_4TH 0x4 + #endif /* __CPLDD06_H__ */ diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c index c5cb77696031..c8f71ecf890a 100644 --- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c +++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c @@ -206,3 +206,19 @@ OemIsNeedDisableExpanderBuffer ( { return TRUE; } + +UINTN OemGetCpuFreq (UINT8 Socket) +{ + UINT8 BoardRevision; + + BoardRevision = MmioRead8 (CPLD_BASE_ADDRESS + CPLD_BOM_VER_FLAG); + + // Board revision 4 and higher run at 2.5GHz + // Earlier revisions run at 2GHz + if (BoardRevision >= CPLD_BOARD_REVISION_4TH) { + return 2500000000; + } else { + return 2000000000; + } +} + -- 2.9.5