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[2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id e135sm11220682wmg.24.2019.03.21.11.41.50 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 21 Mar 2019 11:41:51 -0700 (PDT) Date: Thu, 21 Mar 2019 18:41:49 +0000 From: Leif Lindholm To: Ming Huang Cc: linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org, ard.biesheuvel@linaro.org, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, john.garry@huawei.com, zhangfeng56@huawei.com, xiaojun2@hisilicon.com Message-ID: <20190321184149.virqel622zj2lb5k@bivouac.eciton.net> References: <20190320081729.52806-1-ming.huang@linaro.org> MIME-Version: 1.0 In-Reply-To: <20190320081729.52806-1-ming.huang@linaro.org> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH edk2-non-osi v3 0/8] Upload D0x binary modules X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 21 Mar 2019 18:41:53 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, Mar 20, 2019 at 04:17:21PM +0800, Ming Huang wrote: > Main Changes since v2 : > 1 Move "Add some header files" patch to the first of this series; > > Code can also be found in github: > https://github.com/hisilicon/OpenPlatformPkg.git > branch: 1902-non-osi-v3 Apart from the patches I've called out separately: Reviewed-by: Leif Lindholm Pushed as 635f97e0..99907896. Thanks! > Ming Huang (8): > Hisilicon/D0x: Add some header files > Hisilicon/D06: Remove PCI enumeration dependency from SAS driver > Hisilicon/D0x: Update PlatformSysCtrlLib binary > Hisilicon/D06: Update Mbigen and gic RAS register > Hisilicon/D06: Support PCIe local RAS > Hisilicon/D06: Use new flash layout > Hisilicon/D06: Fix numa node wrong issue > Hisilicon/D06: Add Setup Item "Support DPC" > > Silicon/Hisilicon/Include/Library/IpmiCmdLib.h | 110 +++++++++++++++++++ > Silicon/Hisilicon/Include/Library/LpcLib.h | 113 ++++++++++++++++++++ > Silicon/Hisilicon/Include/Library/OemAddressMapLib.h | 45 ++++++++ > Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h | 112 +++++++++++++++++++ > Silicon/Hisilicon/Include/Library/SerdesLib.h | 21 ++++ > Platform/Hisilicon/D06/CustomData.Fv | Bin 0 -> 65536 bytes > Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.efi | Bin 232832 -> 226784 bytes > Platform/Hisilicon/D06/Drivers/PcieRasInitDxe/PcieRasInitDxe.efi | Bin 21248 -> 22048 bytes > Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.efi | Bin 17984 -> 18720 bytes > Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.depex | Bin 216 -> 36 bytes > Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.efi | Bin 221312 -> 220640 bytes > Platform/Hisilicon/D06/Library/OemAddressMapD06/OemAddressMapD06.lib | Bin 61892 -> 31696 bytes > Platform/Hisilicon/D06/MemoryInitPei/MemoryInit.efi | Bin 297696 -> 358656 bytes > Platform/Hisilicon/D06/Sec/FVMAIN_SEC.Fv | Bin 1048576 -> 1048576 bytes > Platform/Hisilicon/D06/bl1.bin | Bin 12432 -> 12432 bytes > Platform/Hisilicon/D06/fip.bin | Bin 113450 -> 121866 bytes > Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib | Bin 297590 -> 229128 bytes > Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib | Bin 344310 -> 275312 bytes > Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.lib | Bin 356032 -> 375916 bytes > 19 files changed, 401 insertions(+) > create mode 100644 Silicon/Hisilicon/Include/Library/IpmiCmdLib.h > create mode 100755 Silicon/Hisilicon/Include/Library/LpcLib.h > create mode 100644 Silicon/Hisilicon/Include/Library/OemAddressMapLib.h > create mode 100644 Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h > create mode 100644 Silicon/Hisilicon/Include/Library/SerdesLib.h > create mode 100644 Platform/Hisilicon/D06/CustomData.Fv > > -- > 2.9.5 >