From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.120; helo=mga04.intel.com; envelope-from=narendra.k.vanguput@intel.com; receiver=edk2-devel@lists.01.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id D0C98211EA9E1 for ; Thu, 28 Mar 2019 21:58:23 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Mar 2019 21:58:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,283,1549958400"; d="scan'208";a="138238403" Received: from nkvangup-desk4.gar.corp.intel.com ([10.223.18.132]) by orsmga003.jf.intel.com with ESMTP; 28 Mar 2019 21:58:20 -0700 From: nkvangup To: edk2-devel@lists.01.org Cc: Vanguput Narendra K , Eric Dong , Ray Ni , Laszlo Ersek , Yao Jiewen Date: Fri, 29 Mar 2019 10:28:15 +0530 Message-Id: <20190329045815.23616-1-narendra.k.vanguput@intel.com> X-Mailer: git-send-email 2.16.2.windows.1 Subject: [PATCH v6] UefiCpuPkg\CpuSmm: Save & restore CR2 on-demand paging in SMM X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 29 Mar 2019 04:58:24 -0000 BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1593 For every SMI occurrence, save and restore CR2 register only when SMM on-demand paging support is enabled in 64 bit operation mode. This is not a bug but to have better improvement of code. Patch5 is updated with separate functions for Save and Restore of CR2 based on review feedback. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Vanguput Narendra K Cc: Eric Dong Cc: Ray Ni Cc: Laszlo Ersek Cc: Yao Jiewen --- UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c | 26 ++++++++++++++++++++++++++ UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 9 ++++++--- UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 22 ++++++++++++++++++++++ UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 30 ++++++++++++++++++++++++++++++ 4 files changed, 84 insertions(+), 3 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c index b734a1ea8c..af96e42982 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c @@ -316,3 +316,29 @@ SetPageTableAttributes ( return ; } + +/** + This function returns with no action for 32 bit. + + @param[in] *Cr2 Pointer to variable to hold CR2 register value +**/ +VOID +SaveCr2 ( + UINTN *Cr2 + ) +{ + return ; +} + +/** + This function returns with no action for 32 bit. + + @param[in] Cr2 Value to write into CR2 register +**/ +VOID +RestoreCr2 ( + UINTN Cr2 + ) +{ + return ; +} diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c index 3b0b3b52ac..ce70f77709 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c @@ -1112,9 +1112,11 @@ SmiRendezvous ( ASSERT(CpuIndex < mMaxNumberOfCpus); // - // Save Cr2 because Page Fault exception in SMM may override its value + // Save Cr2 because Page Fault exception in SMM may override its value, + // when using on-demand paging for above 4G memory. // - Cr2 = AsmReadCr2 (); + Cr2 = 0; + SaveCr2 (&Cr2); // // Perform CPU specific entry hooks @@ -1253,10 +1255,11 @@ SmiRendezvous ( Exit: SmmCpuFeaturesRendezvousExit (CpuIndex); + // // Restore Cr2 // - AsmWriteCr2 (Cr2); + RestoreCr2 (Cr2); } /** diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h index 84efb22981..c9d147c8a1 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h @@ -1243,4 +1243,26 @@ EFIAPI PiSmmCpuSmiEntryFixupAddress ( ); +/** + This function reads CR2 register when on-demand paging is enabled + for 64 bit and no action for 32 bit. + + @param[in] *Cr2 Pointer to variable to hold CR2 register value +**/ +VOID +SaveCr2 ( + UINTN *Cr2 + ); + +/** + This function writes into CR2 register when on-demand paging is enabled + for 64 bit and no action for 32 bit. + + @param[in] Cr2 Value to write into CR2 register +**/ +VOID +RestoreCr2 ( + UINTN Cr2 + ); + #endif diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c index 2c77cb47a4..6cb44fbbe5 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c @@ -1053,3 +1053,33 @@ SetPageTableAttributes ( return ; } + +/** + This function reads CR2 register when on-demand paging is enabled + + @param[in] *Cr2 Pointer to variable to hold CR2 register value +**/ +VOID +SaveCr2 ( + UINTN *Cr2 + ) +{ + if (!mCpuSmmStaticPageTable) { + *Cr2 = AsmReadCr2 (); + } +} + +/** + This function restores CR2 register when on-demand paging is enabled + + @param[in] Cr2 Value to write into CR2 register +**/ +VOID +RestoreCr2 ( + UINTN Cr2 + ) +{ + if ((!mCpuSmmStaticPageTable) && (Cr2 != 0)) { + AsmWriteCr2 (Cr2); + } +} -- 2.16.2.windows.1