From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: citrix.com, ip: 162.221.156.55, mailfrom: prvs=99536ed25=anthony.perard@citrix.com) Received: from SMTP03.CITRIX.COM (SMTP03.CITRIX.COM [162.221.156.55]) by groups.io with SMTP; Tue, 09 Apr 2019 04:09:02 -0700 X-IronPort-AV: E=Sophos;i="5.60,329,1549929600"; d="scan'208";a="83095178" From: "Anthony PERARD" To: CC: Jordan Justen , Laszlo Ersek , Ard Biesheuvel , Julien Grall , , Anthony PERARD Subject: [PATCH v2 06/31] OvmfPkg/XenResetVector: Add new entry point for Xen PVH Date: Tue, 9 Apr 2019 12:08:19 +0100 Message-ID: <20190409110844.14746-7-anthony.perard@citrix.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190409110844.14746-1-anthony.perard@citrix.com> References: <20190409110844.14746-1-anthony.perard@citrix.com> MIME-Version: 1.0 Return-Path: anthony.perard@citrix.com Content-Transfer-Encoding: 8bit Content-Type: text/plain This one enter directly in 32bits Information on the expected state of the machine when this entry point is used can be found at: https://xenbits.xenproject.org/docs/unstable/misc/pvh.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Anthony PERARD --- {UefiCpuPkg/ResetVector/Vtf0 => OvmfPkg/XenResetVector}/Ia16/ResetVectorVtf0.asm | 18 +++++++- OvmfPkg/XenResetVector/Ia32/XenPVHMain.asm | 47 ++++++++++++++++++++ OvmfPkg/XenResetVector/XenResetVector.nasmb | 1 + 3 files changed, 65 insertions(+), 1 deletion(-) diff --git a/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm b/OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm similarity index 76% copy from UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm copy to OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm index 142d9f3212..46eec66859 100644 --- a/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm +++ b/OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm @@ -3,6 +3,8 @@ ; First code executed by processor after resetting. ; ; Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.
+; Copyright (c) 2019, Citrix Systems, Inc. +; ; This program and the accompanying materials ; are licensed and made available under the terms and conditions of the BSD License ; which accompanies this distribution. The full text of the license may be found at @@ -27,9 +29,23 @@ ALIGN 16 ; located just below 0x100000000 (4GB) in the firmware device. ; %ifdef ALIGN_TOP_TO_4K_FOR_PAGING - TIMES (0x1000 - ($ - EndOfPageTables) - 0x20) DB 0 + TIMES (0x1000 - ($ - EndOfPageTables) - (fourGigabytes - xenPVHEntryPoint)) DB 0 %endif +BITS 32 +xenPVHEntryPoint: +; +; Entry point to use when running as a Xen PVH guest. (0xffffffd0) +; +; Description of the expected state of the machine when this entry point is +; used can be found at: +; https://xenbits.xenproject.org/docs/unstable/misc/pvh.html +; + jmp xenPVHMain + +BITS 16 +ALIGN 16 + applicationProcessorEntryPoint: ; ; Application Processors entry point diff --git a/OvmfPkg/XenResetVector/Ia32/XenPVHMain.asm b/OvmfPkg/XenResetVector/Ia32/XenPVHMain.asm new file mode 100644 index 0000000000..c4802bf4d1 --- /dev/null +++ b/OvmfPkg/XenResetVector/Ia32/XenPVHMain.asm @@ -0,0 +1,47 @@ +;------------------------------------------------------------------------------ +; @file +; An entry point use by Xen when a guest is started in PVH mode. +; +; Copyright (c) 2019, Citrix Systems, Inc. +; +; This program and the accompanying materials are licensed and made available +; under the terms and conditions of the BSD License which accompanies this +; distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT +; WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +;------------------------------------------------------------------------------ + +BITS 32 + +xenPVHMain: + mov di, 'BP' + + ; ESP - Initial value of the EAX register (BIST: Built-in Self Test) + mov esp, eax + + cli + + mov ebx, ADDR_OF(gdtr) + lgdt [ebx] + + mov eax, SEC_DEFAULT_CR0 + mov cr0, eax + + jmp LINEAR_CODE_SEL:ADDR_OF(.jmpToNewCodeSeg) +.jmpToNewCodeSeg: + + mov eax, SEC_DEFAULT_CR4 + mov cr4, eax + + mov ax, LINEAR_SEL + mov ds, ax + mov es, ax + mov fs, ax + mov gs, ax + mov ss, ax + + ; return to the Main16 + OneTimeCallRet TransitionFromReal16To32BitFlat diff --git a/OvmfPkg/XenResetVector/XenResetVector.nasmb b/OvmfPkg/XenResetVector/XenResetVector.nasmb index 49f2bab001..d5a791c139 100644 --- a/OvmfPkg/XenResetVector/XenResetVector.nasmb +++ b/OvmfPkg/XenResetVector/XenResetVector.nasmb @@ -70,6 +70,7 @@ %include "Ia16/Init16.asm" %include "Main.asm" +%include "Ia32/XenPVHMain.asm" %include "Ia16/ResetVectorVtf0.asm" -- Anthony PERARD