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From: "Wu, Hao A" <hao.a.wu@intel.com>
To: devel@edk2.groups.io
Cc: Hao Wu <hao.a.wu@intel.com>, Ray Ni <ray.ni@intel.com>,
	Eric Dong <eric.dong@intel.com>,
	Jian J Wang <jian.j.wang@intel.com>
Subject: [PATCH v3 1/2] MdeModulePkg/AhciPei: Limit max transfer blocknum for 48-bit address
Date: Tue, 23 Apr 2019 16:06:29 +0800	[thread overview]
Message-ID: <20190423080630.14992-2-hao.a.wu@intel.com> (raw)
In-Reply-To: <20190423080630.14992-1-hao.a.wu@intel.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1483

Due to the limited resource on the VTd DMA buffer size in the PEI phase,
the driver will limit the maximum transfer block number for 48-bit
addressing.

According to PCDs:
gIntelSiliconPkgTokenSpaceGuid.PcdVTdPeiDmaBufferSize|0x00400000
gIntelSiliconPkgTokenSpaceGuid.PcdVTdPeiDmaBufferSizeS3|0x00200000

The default buffer size allocated for IOMMU mapping is:
* 4M bytes for non-S3 cases;
* 2M bytes for S3

For ATA devices in 48-bit address mode, the maximum block number is
currently set to 0xFFFF. For a device with block size equal to 512 bytes,
the maximum buffer allowed for mapping within AhciPei driver will be close
to 32M bytes. Thus, this commit will limit the 48-bit mode maximum block
number to 0x800, which means 1M-byte maximum buffer for mapping when the
block size of a device is 512 bytes. By doing so, potential failure on
calls to the IOMMU 'Map' service can be avoided.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
---
 MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c b/MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c
index a83c213a47..11754b3057 100644
--- a/MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c
+++ b/MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c
@@ -48,7 +48,13 @@ UINT8  mAtaTrustCommands[2] = {
 // Look up table (Lba48Bit) for maximum transfer block number
 //
 #define MAX_28BIT_TRANSFER_BLOCK_NUM     0x100
-#define MAX_48BIT_TRANSFER_BLOCK_NUM     0xFFFF
+//
+// Due to limited resource for VTd PEI DMA buffer on platforms, the driver
+// limits the maximum transfer block number for 48-bit addressing.
+// Here, setting to 0x800 means that for device with 512-byte block size, the
+// maximum buffer for DMA mapping will be 1M bytes in size.
+//
+#define MAX_48BIT_TRANSFER_BLOCK_NUM     0x800
 
 UINT32 mMaxTransferBlockNumber[2] = {
   MAX_28BIT_TRANSFER_BLOCK_NUM,
-- 
2.12.0.windows.1


  reply	other threads:[~2019-04-23  8:06 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-23  8:06 [PATCH v3 0/2] Add PEI BlockIO support for ATA AHCI mode devices Wu, Hao A
2019-04-23  8:06 ` Wu, Hao A [this message]
2019-04-23 18:12   ` [edk2-devel] [PATCH v3 1/2] MdeModulePkg/AhciPei: Limit max transfer blocknum for 48-bit address Ni, Ray
2019-04-23  8:06 ` [PATCH v3 2/2] MdeModulePkg/AhciPei: Add PEI BlockIO support Wu, Hao A
2019-04-23 18:14   ` [edk2-devel] " Ni, Ray

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