[edk2-platforms: PATCH v3 0/4] Armada7k8k FVB improvements

[edk2-platforms: PATCH v3 0/4] Armada7k8k FVB improvements

[Marcin Wojtas]

Hi,

The third version of the patchset cleans up the dependencies between
the SPI drivers, so that now they explicitly rely on the protocols'
instead of BEFORE statements and modules GUIDs. Also force dependency
between FTW and MvFvbDxe using library NULL resolution.

The patches are available in the github:
https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/fvb-upstream-r20190425

I'm looking forward to your comments or remarks.

Best regards,
Marcin

Changelog:
v2->v3

3/4 (new patch)
 * Clean-up MvSpiFlashDxe / MvSpiOrionDxe / MvFvbDxe dependencies and
   rely on the protocols' GUIDs

4/4
 * Force dependency for loading FTW driver

v1->v2
 * Replace clock-enabling patch with PEI phase FV cleanup

Hanna Hawa (1):
  Marvell/Drivers: MvFvbDxe: Change Pcd parameters to be 64 bit

Kornel Duleba (1):
  Marvell/Drivers: MvFvbDxe: Introduce non-mmio mode

Marcin Wojtas (2):
  Marvell/Armada7k8k: Cleanup PEI phase FV
  Marvell/Drivers/Spi: Improve modules dependencies

 Silicon/Marvell/Marvell.dec                                 |   7 +-
 Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc               |  18 ++-
 Silicon/Marvell/Armada7k8k/Armada7k8k.fdf                   |   3 -
 Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.inf           |  14 +-
 Silicon/Marvell/Drivers/Spi/MvSpiFlashDxe/MvSpiFlashDxe.inf |   5 +-
 Silicon/Marvell/Drivers/Spi/MvSpiOrionDxe/MvSpiOrionDxe.inf |   5 +-
 Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.h             |   1 +
 Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.c             | 149 +++++++++++++++-----
 8 files changed, 140 insertions(+), 62 deletions(-)

-- 
2.7.4

[edk2-platforms: PATCH v3 1/4] Marvell/Drivers: MvFvbDxe: Change Pcd parameters to be 64 bit

[Marcin Wojtas]

From: Hanna Hawa <hannah@marvell.com>

Update PCD paramters to be 64 bit, so that to add more flexibility
for the platforms in terms of configuring memory-mapped SPI access.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Silicon/Marvell/Marvell.dec                       |  2 +-
 Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc     |  6 +++---
 Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.inf |  6 +++---
 Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.c   | 18 +++++++++---------
 4 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/Silicon/Marvell/Marvell.dec b/Silicon/Marvell/Marvell.dec
index c927078..7210ba2 100644
--- a/Silicon/Marvell/Marvell.dec
+++ b/Silicon/Marvell/Marvell.dec
@@ -139,7 +139,7 @@
 
 #SPI
   gMarvellTokenSpaceGuid.PcdSpiRegBase|0|UINT32|0x3000051
-  gMarvellTokenSpaceGuid.PcdSpiMemoryBase|0|UINT32|0x3000059
+  gMarvellTokenSpaceGuid.PcdSpiMemoryBase|0|UINT64|0x3000059
   gMarvellTokenSpaceGuid.PcdSpiMaxFrequency|0|UINT32|0x30000052
   gMarvellTokenSpaceGuid.PcdSpiClockFrequency|0|UINT32|0x30000053
 
diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
index 0ced400..a1ebb81 100644
--- a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
+++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
@@ -396,11 +396,11 @@
   # Variable store - default values
   #
   gMarvellTokenSpaceGuid.PcdSpiMemoryBase|0xF9000000
-  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0xF93C0000
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|0xF93C0000
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x00010000
-  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0xF93D0000
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|0xF93D0000
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x00010000
-  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0xF93E0000
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|0xF93E0000
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010000
 
 !if $(CAPSULE_ENABLE)
diff --git a/Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.inf b/Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.inf
index fd3f2f7..ef10bfd 100644
--- a/Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.inf
+++ b/Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.inf
@@ -76,11 +76,11 @@
   gMarvellSpiMasterProtocolGuid
 
 [FixedPcd]
-  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
-  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
-  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
   gMarvellTokenSpaceGuid.PcdSpiMemoryBase
 
diff --git a/Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.c b/Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.c
index 1a41a4f..cb006cd 100644
--- a/Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.c
+++ b/Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.c
@@ -145,12 +145,12 @@ MvFvbInitFvAndVariableStoreHeaders (
   // FirmwareVolumeHeader->FvLength is declared to have the Variable area
   // AND the FTW working area AND the FTW Spare contiguous.
   //
-  ASSERT (PcdGet32 (PcdFlashNvStorageVariableBase) +
+  ASSERT (PcdGet64 (PcdFlashNvStorageVariableBase64) +
     PcdGet32 (PcdFlashNvStorageVariableSize) ==
-    PcdGet32 (PcdFlashNvStorageFtwWorkingBase));
-  ASSERT (PcdGet32 (PcdFlashNvStorageFtwWorkingBase) +
+    PcdGet64 (PcdFlashNvStorageFtwWorkingBase64));
+  ASSERT (PcdGet64 (PcdFlashNvStorageFtwWorkingBase64) +
     PcdGet32 (PcdFlashNvStorageFtwWorkingSize) ==
-    PcdGet32 (PcdFlashNvStorageFtwSpareBase));
+    PcdGet64 (PcdFlashNvStorageFtwSpareBase64));
 
   // Check if the size of the area is at least one block size
   ASSERT ((PcdGet32 (PcdFlashNvStorageVariableSize) > 0) &&
@@ -161,9 +161,9 @@ MvFvbInitFvAndVariableStoreHeaders (
     (PcdGet32 (PcdFlashNvStorageFtwSpareSize) / BlockSize > 0));
 
   // Ensure the Variable areas are aligned on block size boundaries
-  ASSERT ((PcdGet32 (PcdFlashNvStorageVariableBase) % BlockSize) == 0);
-  ASSERT ((PcdGet32 (PcdFlashNvStorageFtwWorkingBase) % BlockSize) == 0);
-  ASSERT ((PcdGet32 (PcdFlashNvStorageFtwSpareBase) % BlockSize) == 0);
+  ASSERT ((PcdGet64 (PcdFlashNvStorageVariableBase64) % BlockSize) == 0);
+  ASSERT ((PcdGet64 (PcdFlashNvStorageFtwWorkingBase64) % BlockSize) == 0);
+  ASSERT ((PcdGet64 (PcdFlashNvStorageFtwSpareBase64) % BlockSize) == 0);
 
   //
   // EFI_FIRMWARE_VOLUME_HEADER
@@ -1009,8 +1009,8 @@ MvFvbConfigureFlashInstance (
   }
 
   // Fill remaining flash description
-  FlashInstance->DeviceBaseAddress = PcdGet32 (PcdSpiMemoryBase);
-  FlashInstance->RegionBaseAddress = FixedPcdGet32 (PcdFlashNvStorageVariableBase);
+  FlashInstance->DeviceBaseAddress = PcdGet64 (PcdSpiMemoryBase);
+  FlashInstance->RegionBaseAddress = FixedPcdGet64 (PcdFlashNvStorageVariableBase64);
   FlashInstance->FvbOffset = FlashInstance->RegionBaseAddress -
                              FlashInstance->DeviceBaseAddress;
   FlashInstance->FvbSize = PcdGet32(PcdFlashNvStorageVariableSize) +
-- 
2.7.4

[edk2-platforms: PATCH v3 2/4] Marvell/Armada7k8k: Cleanup PEI phase FV

[Marcin Wojtas]

Currently supported the capsule update scenarios on Armada
platforms require only the SystemFirmwareDescriptor to be installed
in the PEI phase. Remove redundant components and reduce
PEI phase FV footprint.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 3 ---
 Silicon/Marvell/Armada7k8k/Armada7k8k.fdf     | 3 ---
 2 files changed, 6 deletions(-)

diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
index a1ebb81..ca3de2e 100644
--- a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
+++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
@@ -427,10 +427,7 @@
   ArmPlatformPkg/PlatformPei/PlatformPeim.inf
   ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
   ArmPkg/Drivers/CpuPei/CpuPei.inf
-  MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
 !if $(CAPSULE_ENABLE)
-  MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
-  MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
   Silicon/Marvell/Armada7k8k/Feature/Capsule/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
 !endif
   MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
index 5ee7889..3a320ba 100644
--- a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
+++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
@@ -254,10 +254,7 @@ READ_LOCK_STATUS   = TRUE
   INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
   INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
   INF ArmPkg/Drivers/CpuPei/CpuPei.inf
-  INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
 !if $(CAPSULE_ENABLE)
-  INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
-  INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
   INF RuleOverride = FMP_IMAGE_DESC Silicon/Marvell/Armada7k8k/Feature/Capsule/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
 !endif
   INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
-- 
2.7.4

[edk2-platforms: PATCH v3 3/4] Marvell/Drivers/Spi: Improve modules dependencies

[Marcin Wojtas]

Currently the Marvell SPI DXE drivers depexes are specified
with explicit modules' GUIDs and BEFORE/AFTER expressions.
Replace it with the actual protocol dependencies.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Silicon/Marvell/Marvell.dec                                 | 3 ---
 Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.inf           | 4 +++-
 Silicon/Marvell/Drivers/Spi/MvSpiFlashDxe/MvSpiFlashDxe.inf | 5 +----
 Silicon/Marvell/Drivers/Spi/MvSpiOrionDxe/MvSpiOrionDxe.inf | 5 +----
 4 files changed, 5 insertions(+), 12 deletions(-)

diff --git a/Silicon/Marvell/Marvell.dec b/Silicon/Marvell/Marvell.dec
index 7210ba2..641c53b 100644
--- a/Silicon/Marvell/Marvell.dec
+++ b/Silicon/Marvell/Marvell.dec
@@ -56,9 +56,6 @@
   gShellFUpdateHiiGuid = { 0x9b5d2176, 0x590a, 0x49db, { 0x89, 0x5d, 0x4a, 0x70, 0xfe, 0xad, 0xbe, 0x24 } }
   gShellSfHiiGuid = { 0x03a67756, 0x8cde, 0x4638, { 0x82, 0x34, 0x4a, 0x0f, 0x6d, 0x58, 0x81, 0x39 } }
 
-  gMarvellFvbDxeGuid = { 0x42903750, 0x7e61, 0x4aaf, { 0x83, 0x29, 0xbf, 0x42, 0x36, 0x4e, 0x24, 0x85 } }
-  gMarvellSpiFlashDxeGuid = { 0x49d7fb74, 0x306d, 0x42bd, { 0x94, 0xc8, 0xc0, 0xc5, 0x4b, 0x18, 0x1d, 0xd7 } }
-
 [LibraryClasses]
   ArmadaBoardDescLib|Include/Library/ArmadaBoardDescLib.h
   ArmadaIcuLib|Include/Library/ArmadaIcuLib.h
diff --git a/Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.inf b/Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.inf
index ef10bfd..e222075 100644
--- a/Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.inf
+++ b/Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.inf
@@ -85,4 +85,6 @@
   gMarvellTokenSpaceGuid.PcdSpiMemoryBase
 
 [Depex]
-  gEfiCpuArchProtocolGuid
+  gEfiCpuArchProtocolGuid AND
+  gMarvellSpiMasterProtocolGuid AND
+  gMarvellSpiFlashProtocolGuid
diff --git a/Silicon/Marvell/Drivers/Spi/MvSpiFlashDxe/MvSpiFlashDxe.inf b/Silicon/Marvell/Drivers/Spi/MvSpiFlashDxe/MvSpiFlashDxe.inf
index 20939bf..ce843e9 100644
--- a/Silicon/Marvell/Drivers/Spi/MvSpiFlashDxe/MvSpiFlashDxe.inf
+++ b/Silicon/Marvell/Drivers/Spi/MvSpiFlashDxe/MvSpiFlashDxe.inf
@@ -64,7 +64,4 @@
   gMarvellSpiMasterProtocolGuid
 
 [Depex]
-  #
-  # MvSpiFlashDxe must be loaded prior to variables driver MvFvbDxe
-  #
-  BEFORE gMarvellFvbDxeGuid
+  gMarvellSpiMasterProtocolGuid
diff --git a/Silicon/Marvell/Drivers/Spi/MvSpiOrionDxe/MvSpiOrionDxe.inf b/Silicon/Marvell/Drivers/Spi/MvSpiOrionDxe/MvSpiOrionDxe.inf
index 4779371..628ab39 100644
--- a/Silicon/Marvell/Drivers/Spi/MvSpiOrionDxe/MvSpiOrionDxe.inf
+++ b/Silicon/Marvell/Drivers/Spi/MvSpiOrionDxe/MvSpiOrionDxe.inf
@@ -67,7 +67,4 @@
   gMarvellSpiMasterProtocolGuid
 
 [Depex]
-  #
-  # MvSpiDxe must be loaded prior to MvSpiFlash driver
-  #
-  BEFORE gMarvellSpiFlashDxeGuid
+  TRUE
-- 
2.7.4

[edk2-platforms: PATCH v3 4/4] Marvell/Drivers: MvFvbDxe: Introduce non-mmio mode

[Marcin Wojtas]

From: Kornel Duleba <mindal@semihalf.com>

This path enables support for reading variables directly from flash without
relying on it to be memory mapped. It adds PcdSpiMemoryMapped PCD that
allows to switch between the modes. When in non-memory-mapped mode the
driver will copy the variables from flash to previously allocated buffer
and set PcdFlashNvStorageVariableBase64, PcdFlashNvStorageFtwWorkingBase64
and PcdFlashNvStorageFtwSpareBase64 accordingly. Because of that satisfy
a depex dependency with the FTW driver by hooking NvVarStoreFormattedLib.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Silicon/Marvell/Marvell.dec                       |   2 +
 Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc     |  15 ++-
 Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.inf |  10 +-
 Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.h   |   1 +
 Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.c   | 135 +++++++++++++++-----
 5 files changed, 127 insertions(+), 36 deletions(-)

diff --git a/Silicon/Marvell/Marvell.dec b/Silicon/Marvell/Marvell.dec
index 641c53b..2b25ae9 100644
--- a/Silicon/Marvell/Marvell.dec
+++ b/Silicon/Marvell/Marvell.dec
@@ -137,6 +137,8 @@
 #SPI
   gMarvellTokenSpaceGuid.PcdSpiRegBase|0|UINT32|0x3000051
   gMarvellTokenSpaceGuid.PcdSpiMemoryBase|0|UINT64|0x3000059
+  gMarvellTokenSpaceGuid.PcdSpiMemoryMapped|TRUE|BOOLEAN|0x3000060
+  gMarvellTokenSpaceGuid.PcdSpiVariableOffset|0|UINT32|0x3000061
   gMarvellTokenSpaceGuid.PcdSpiMaxFrequency|0|UINT32|0x30000052
   gMarvellTokenSpaceGuid.PcdSpiClockFrequency|0|UINT32|0x30000053
 
diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
index ca3de2e..545b369 100644
--- a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
+++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
@@ -256,6 +256,11 @@
   # USB support
   gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE
 
+[PcdsDynamicDefault.common]
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|0xF93C0000
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|0xF93E0000
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|0xF93D0000
+
 [PcdsFixedAtBuild.common]
   gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"MARVELL_EFI"
   gArmPlatformTokenSpaceGuid.PcdCoreCount|4
@@ -396,11 +401,10 @@
   # Variable store - default values
   #
   gMarvellTokenSpaceGuid.PcdSpiMemoryBase|0xF9000000
-  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|0xF93C0000
+  gMarvellTokenSpaceGuid.PcdSpiMemoryMapped|TRUE
+  gMarvellTokenSpaceGuid.PcdSpiVariableOffset|0x3C0000
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x00010000
-  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|0xF93D0000
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x00010000
-  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|0xF93E0000
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010000
 
 !if $(CAPSULE_ENABLE)
@@ -558,7 +562,10 @@
   # Variable services
   #
   Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.inf
-  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
+  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf {
+    <LibraryClasses>
+      NULL|EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf
+  }
   MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
     <LibraryClasses>
       AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/AuthVariableLibNull.inf
diff --git a/Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.inf b/Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.inf
index e222075..128c538 100644
--- a/Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.inf
+++ b/Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.inf
@@ -76,13 +76,17 @@
   gMarvellSpiMasterProtocolGuid
 
 [FixedPcd]
-  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
-  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
-  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
   gMarvellTokenSpaceGuid.PcdSpiMemoryBase
+  gMarvellTokenSpaceGuid.PcdSpiMemoryMapped
+  gMarvellTokenSpaceGuid.PcdSpiVariableOffset
+
+[Pcd]
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64
 
 [Depex]
   gEfiCpuArchProtocolGuid AND
diff --git a/Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.h b/Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.h
index 31e6e44..e8df9a5 100644
--- a/Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.h
+++ b/Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.h
@@ -55,6 +55,7 @@ typedef struct {
 
   UINT32                              Signature;
 
+  BOOLEAN                             IsMemoryMapped;
   UINTN                               DeviceBaseAddress;
   UINTN                               RegionBaseAddress;
   UINTN                               Size;
diff --git a/Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.c b/Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.c
index cb006cd..b4fd29c 100644
--- a/Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.c
+++ b/Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.c
@@ -52,6 +52,7 @@ STATIC CONST FVB_DEVICE mMvFvbFlashInstanceTemplate = {
 
   FVB_FLASH_SIGNATURE, // Signature
 
+  FALSE, // IsMemoryMapped ... NEED TO BE FILLED
   0, // DeviceBaseAddress ... NEED TO BE FILLED
   0, // RegionBaseAddress ... NEED TO BE FILLED
   SIZE_256KB, // Size
@@ -175,11 +176,14 @@ MvFvbInitFvAndVariableStoreHeaders (
   FirmwareVolumeHeader->Attributes = EFI_FVB2_READ_ENABLED_CAP |
                                      EFI_FVB2_READ_STATUS |
                                      EFI_FVB2_STICKY_WRITE |
-                                     EFI_FVB2_MEMORY_MAPPED |
                                      EFI_FVB2_ERASE_POLARITY |
                                      EFI_FVB2_WRITE_STATUS |
                                      EFI_FVB2_WRITE_ENABLED_CAP;
 
+  if (FlashInstance->IsMemoryMapped) {
+    FirmwareVolumeHeader->Attributes |= EFI_FVB2_MEMORY_MAPPED;
+  }
+
   FirmwareVolumeHeader->HeaderLength = sizeof (EFI_FIRMWARE_VOLUME_HEADER) +
                                        sizeof (EFI_FV_BLOCK_MAP_ENTRY);
   FirmwareVolumeHeader->Revision = EFI_FVH_REVISION;
@@ -349,10 +353,13 @@ MvFvbSetAttributes (
   EFI_FVB_ATTRIBUTES_2  OldAttributes;
   EFI_FVB_ATTRIBUTES_2  FlashFvbAttributes;
   EFI_FVB_ATTRIBUTES_2  UnchangedAttributes;
+  FVB_DEVICE           *FlashInstance;
   UINT32                Capabilities;
   UINT32                OldStatus;
   UINT32                NewStatus;
 
+  FlashInstance = INSTANCE_FROM_FVB_THIS (This);
+
   //
   // Obtain attributes from FVB header
   //
@@ -369,12 +376,15 @@ MvFvbSetAttributes (
                         EFI_FVB2_WRITE_ENABLED_CAP  | \
                         EFI_FVB2_LOCK_CAP           | \
                         EFI_FVB2_STICKY_WRITE       | \
-                        EFI_FVB2_MEMORY_MAPPED      | \
                         EFI_FVB2_ERASE_POLARITY     | \
                         EFI_FVB2_READ_LOCK_CAP      | \
                         EFI_FVB2_WRITE_LOCK_CAP     | \
                         EFI_FVB2_ALIGNMENT;
 
+  if (FlashInstance->IsMemoryMapped) {
+    UnchangedAttributes |= EFI_FVB2_MEMORY_MAPPED;
+  }
+
   //
   // Some attributes of FV is read only can *not* be set
   //
@@ -692,6 +702,7 @@ MvFvbWrite (
   IN        UINT8                                 *Buffer
   )
 {
+  EFI_STATUS    Status;
   FVB_DEVICE   *FlashInstance;
   UINTN         DataOffset;
 
@@ -701,10 +712,27 @@ MvFvbWrite (
                  FlashInstance->StartLba + Lba,
                  FlashInstance->Media.BlockSize);
 
-  return FlashInstance->SpiFlashProtocol->Write (&FlashInstance->SpiDevice,
-                                            DataOffset,
-                                            *NumBytes,
-                                            Buffer);
+  Status = FlashInstance->SpiFlashProtocol->Write (&FlashInstance->SpiDevice,
+                                              DataOffset,
+                                              *NumBytes,
+                                              Buffer);
+  if (EFI_ERROR (Status)) {
+    DEBUG ((DEBUG_ERROR,
+      "%a: Failed to write to Spi device\n",
+      __FUNCTION__));
+    return Status;
+  }
+
+  // Update shadow buffer
+  if (!FlashInstance->IsMemoryMapped) {
+    DataOffset = GET_DATA_OFFSET (FlashInstance->RegionBaseAddress + Offset,
+                   FlashInstance->StartLba + Lba,
+                   FlashInstance->Media.BlockSize);
+
+    CopyMem ((UINTN *)DataOffset, Buffer, *NumBytes);
+  }
+
+  return EFI_SUCCESS;
 }
 
 /**
@@ -975,6 +1003,9 @@ MvFvbConfigureFlashInstance (
   )
 {
   EFI_STATUS Status;
+  UINTN     *NumBytes;
+  UINTN     DataOffset;
+  UINTN     VariableSize, FtwWorkingSize, FtwSpareSize, MemorySize;
 
 
   // Locate SPI protocols
@@ -1009,25 +1040,62 @@ MvFvbConfigureFlashInstance (
   }
 
   // Fill remaining flash description
-  FlashInstance->DeviceBaseAddress = PcdGet64 (PcdSpiMemoryBase);
-  FlashInstance->RegionBaseAddress = FixedPcdGet64 (PcdFlashNvStorageVariableBase64);
-  FlashInstance->FvbOffset = FlashInstance->RegionBaseAddress -
-                             FlashInstance->DeviceBaseAddress;
-  FlashInstance->FvbSize = PcdGet32(PcdFlashNvStorageVariableSize) +
-                           PcdGet32(PcdFlashNvStorageFtwWorkingSize) +
-                           PcdGet32(PcdFlashNvStorageFtwSpareSize);
+  VariableSize = PcdGet32 (PcdFlashNvStorageVariableSize);
+  FtwWorkingSize = PcdGet32 (PcdFlashNvStorageFtwWorkingSize);
+  FtwSpareSize = PcdGet32 (PcdFlashNvStorageFtwSpareSize);
+
+  FlashInstance->IsMemoryMapped = PcdGetBool (PcdSpiMemoryMapped);
+  FlashInstance->FvbSize = VariableSize + FtwWorkingSize + FtwSpareSize;
+  FlashInstance->FvbOffset = PcdGet32 (PcdSpiVariableOffset);
 
   FlashInstance->Media.MediaId = 0;
   FlashInstance->Media.BlockSize = FlashInstance->SpiDevice.Info->SectorSize;
   FlashInstance->Media.LastBlock = FlashInstance->Size /
                                    FlashInstance->Media.BlockSize - 1;
 
+  if (FlashInstance->IsMemoryMapped) {
+    FlashInstance->DeviceBaseAddress = PcdGet64 (PcdSpiMemoryBase);
+    FlashInstance->RegionBaseAddress = PcdGet64 (PcdFlashNvStorageVariableBase64);
+  } else {
+    MemorySize = EFI_SIZE_TO_PAGES (FlashInstance->FvbSize);
+
+    // FaultTolerantWriteDxe requires memory to be aligned to FtwWorkingSize
+    FlashInstance->RegionBaseAddress = (UINTN) AllocateAlignedRuntimePages (MemorySize,
+                                                 SIZE_64KB);
+    if (FlashInstance->RegionBaseAddress == (UINTN) NULL) {
+        return EFI_OUT_OF_RESOURCES;
+    }
+
+    PcdSet64 (PcdFlashNvStorageVariableBase64,
+      (UINT64) FlashInstance->RegionBaseAddress);
+    PcdSet64 (PcdFlashNvStorageFtwWorkingBase64,
+      (UINT64) FlashInstance->RegionBaseAddress
+      + VariableSize);
+    PcdSet64 (PcdFlashNvStorageFtwSpareBase64,
+      (UINT64) FlashInstance->RegionBaseAddress
+      + VariableSize
+      + FtwWorkingSize);
+
+    // Fill the buffer with data from flash
+    DataOffset = GET_DATA_OFFSET (FlashInstance->FvbOffset,
+                   FlashInstance->StartLba,
+                   FlashInstance->Media.BlockSize);
+    *NumBytes = FlashInstance->FvbSize;
+    Status = FlashInstance->SpiFlashProtocol->Read (&FlashInstance->SpiDevice,
+                                                DataOffset,
+                                                *NumBytes,
+                                                (VOID *)FlashInstance->RegionBaseAddress);
+    if (EFI_ERROR (Status)) {
+      goto ErrorFreeAllocatedPages;
+    }
+  }
+
   Status = gBS->InstallMultipleProtocolInterfaces (&FlashInstance->Handle,
                   &gEfiDevicePathProtocolGuid, &FlashInstance->DevicePath,
                   &gEfiFirmwareVolumeBlockProtocolGuid, &FlashInstance->FvbProtocol,
                   NULL);
   if (EFI_ERROR (Status)) {
-    return Status;
+    goto ErrorFreeAllocatedPages;
   }
 
   Status = MvFvbPrepareFvHeader (FlashInstance);
@@ -1043,6 +1111,12 @@ ErrorPrepareFvbHeader:
          &gEfiFirmwareVolumeBlockProtocolGuid,
          NULL);
 
+ErrorFreeAllocatedPages:
+  if (!FlashInstance->IsMemoryMapped) {
+    FreeAlignedPages ((VOID *)FlashInstance->RegionBaseAddress,
+      MemorySize);
+  }
+
   return Status;
 }
 
@@ -1094,24 +1168,27 @@ MvFvbEntryPoint (
   //
   // Declare the Non-Volatile storage as EFI_MEMORY_RUNTIME
   //
-  RuntimeMmioRegionSize = mFvbDevice->FvbSize;
   RegionBaseAddress = mFvbDevice->RegionBaseAddress;
 
-  Status = gDS->AddMemorySpace (EfiGcdMemoryTypeMemoryMappedIo,
-                  RegionBaseAddress,
-                  RuntimeMmioRegionSize,
-                  EFI_MEMORY_UC | EFI_MEMORY_RUNTIME);
-  if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR, "%a: Failed to add memory space\n", __FUNCTION__));
-    goto ErrorAddSpace;
-  }
+  if (mFvbDevice->IsMemoryMapped) {
+    RuntimeMmioRegionSize = mFvbDevice->FvbSize;
+    Status = gDS->AddMemorySpace (EfiGcdMemoryTypeMemoryMappedIo,
+                    RegionBaseAddress,
+                    RuntimeMmioRegionSize,
+                    EFI_MEMORY_UC | EFI_MEMORY_RUNTIME);
+    if (EFI_ERROR (Status)) {
+      DEBUG ((DEBUG_ERROR, "%a: Failed to add memory space\n", __FUNCTION__));
+      goto ErrorAddSpace;
+    }
 
-  Status = gDS->SetMemorySpaceAttributes (RegionBaseAddress,
-                  RuntimeMmioRegionSize,
-                  EFI_MEMORY_UC | EFI_MEMORY_RUNTIME);
-  if (EFI_ERROR (Status)) {
-    DEBUG ((DEBUG_ERROR, "%a: Failed to set memory attributes\n", __FUNCTION__));
-    goto ErrorSetMemAttr;
+
+    Status = gDS->SetMemorySpaceAttributes (RegionBaseAddress,
+                    RuntimeMmioRegionSize,
+                    EFI_MEMORY_UC | EFI_MEMORY_RUNTIME);
+    if (EFI_ERROR (Status)) {
+     DEBUG ((DEBUG_ERROR, "%a: Failed to set memory attributes\n", __FUNCTION__));
+      goto ErrorSetMemAttr;
+    }
   }
 
   //
-- 
2.7.4

Re: [edk2-platforms: PATCH v3 0/4] Armada7k8k FVB improvements

[Leif Lindholm]

Hi Marcin,

Just to be awkward - edk2-platforms (and edk2-non-osi) have not yet
been relicensed, so we still need "contributed-under" here.

For this series, can you confirm to the list that this is indeed
Contributed-under: TianoCore Contribution Agreement 1.1
? If so, we can fix that up before committing.

I'll start looking into what we need to do for a license transition
for edk2-platforms master next week.

Best Regards,

Leif

On Thu, Apr 25, 2019 at 01:28:20PM +0200, Marcin Wojtas wrote:
> Hi,
> 
> The third version of the patchset cleans up the dependencies between
> the SPI drivers, so that now they explicitly rely on the protocols'
> instead of BEFORE statements and modules GUIDs. Also force dependency
> between FTW and MvFvbDxe using library NULL resolution.
> 
> The patches are available in the github:
> https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/fvb-upstream-r20190425
> 
> I'm looking forward to your comments or remarks.
> 
> Best regards,
> Marcin
> 
> Changelog:
> v2->v3
> 
> 3/4 (new patch)
>  * Clean-up MvSpiFlashDxe / MvSpiOrionDxe / MvFvbDxe dependencies and
>    rely on the protocols' GUIDs
> 
> 4/4
>  * Force dependency for loading FTW driver
> 
> v1->v2
>  * Replace clock-enabling patch with PEI phase FV cleanup
> 
> Hanna Hawa (1):
>   Marvell/Drivers: MvFvbDxe: Change Pcd parameters to be 64 bit
> 
> Kornel Duleba (1):
>   Marvell/Drivers: MvFvbDxe: Introduce non-mmio mode
> 
> Marcin Wojtas (2):
>   Marvell/Armada7k8k: Cleanup PEI phase FV
>   Marvell/Drivers/Spi: Improve modules dependencies
> 
>  Silicon/Marvell/Marvell.dec                                 |   7 +-
>  Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc               |  18 ++-
>  Silicon/Marvell/Armada7k8k/Armada7k8k.fdf                   |   3 -
>  Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.inf           |  14 +-
>  Silicon/Marvell/Drivers/Spi/MvSpiFlashDxe/MvSpiFlashDxe.inf |   5 +-
>  Silicon/Marvell/Drivers/Spi/MvSpiOrionDxe/MvSpiOrionDxe.inf |   5 +-
>  Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.h             |   1 +
>  Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.c             | 149 +++++++++++++++-----
>  8 files changed, 140 insertions(+), 62 deletions(-)
> 
> -- 
> 2.7.4
> 

Re: [edk2-platforms: PATCH v3 0/4] Armada7k8k FVB improvements

[Marcin Wojtas]

Hi Leif,

czw., 25 kwi 2019 o 14:01 Leif Lindholm <leif.lindholm@linaro.org> napisał(a):
>
> Hi Marcin,
>
> Just to be awkward - edk2-platforms (and edk2-non-osi) have not yet
> been relicensed, so we still need "contributed-under" here.
>
> For this series, can you confirm to the list that this is indeed
> Contributed-under: TianoCore Contribution Agreement 1.1
> ? If so, we can fix that up before committing.
>

Yes, I confirm that - if possible fix-up. Actually I removed those
lines right before sending :)

Best regards,
Marcin

> I'll start looking into what we need to do for a license transition
> for edk2-platforms master next week.
>
> Best Regards,
>
> Leif
>
> On Thu, Apr 25, 2019 at 01:28:20PM +0200, Marcin Wojtas wrote:
> > Hi,
> >
> > The third version of the patchset cleans up the dependencies between
> > the SPI drivers, so that now they explicitly rely on the protocols'
> > instead of BEFORE statements and modules GUIDs. Also force dependency
> > between FTW and MvFvbDxe using library NULL resolution.
> >
> > The patches are available in the github:
> > https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/fvb-upstream-r20190425
> >
> > I'm looking forward to your comments or remarks.
> >
> > Best regards,
> > Marcin
> >
> > Changelog:
> > v2->v3
> >
> > 3/4 (new patch)
> >  * Clean-up MvSpiFlashDxe / MvSpiOrionDxe / MvFvbDxe dependencies and
> >    rely on the protocols' GUIDs
> >
> > 4/4
> >  * Force dependency for loading FTW driver
> >
> > v1->v2
> >  * Replace clock-enabling patch with PEI phase FV cleanup
> >
> > Hanna Hawa (1):
> >   Marvell/Drivers: MvFvbDxe: Change Pcd parameters to be 64 bit
> >
> > Kornel Duleba (1):
> >   Marvell/Drivers: MvFvbDxe: Introduce non-mmio mode
> >
> > Marcin Wojtas (2):
> >   Marvell/Armada7k8k: Cleanup PEI phase FV
> >   Marvell/Drivers/Spi: Improve modules dependencies
> >
> >  Silicon/Marvell/Marvell.dec                                 |   7 +-
> >  Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc               |  18 ++-
> >  Silicon/Marvell/Armada7k8k/Armada7k8k.fdf                   |   3 -
> >  Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.inf           |  14 +-
> >  Silicon/Marvell/Drivers/Spi/MvSpiFlashDxe/MvSpiFlashDxe.inf |   5 +-
> >  Silicon/Marvell/Drivers/Spi/MvSpiOrionDxe/MvSpiOrionDxe.inf |   5 +-
> >  Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.h             |   1 +
> >  Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.c             | 149 +++++++++++++++-----
> >  8 files changed, 140 insertions(+), 62 deletions(-)
> >
> > --
> > 2.7.4
> >

Re: [edk2-platforms: PATCH v3 0/4] Armada7k8k FVB improvements

[Marcin Wojtas]

Hi Leif, Ard,

czw., 25 kwi 2019 o 14:35 Marcin Wojtas <mw@semihalf.com> napisał(a):
>
> Hi Leif,
>
> czw., 25 kwi 2019 o 14:01 Leif Lindholm <leif.lindholm@linaro.org> napisał(a):
> >
> > Hi Marcin,
> >
> > Just to be awkward - edk2-platforms (and edk2-non-osi) have not yet
> > been relicensed, so we still need "contributed-under" here.
> >
> > For this series, can you confirm to the list that this is indeed
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > ? If so, we can fix that up before committing.
> >
>
> Yes, I confirm that - if possible fix-up. Actually I removed those
> lines right before sending :)
>

Do you have any more comments on the patchset?

Thanks,
Marcin

> Best regards,
> Marcin
>
> > I'll start looking into what we need to do for a license transition
> > for edk2-platforms master next week.
> >
> > Best Regards,
> >
> > Leif
> >
> > On Thu, Apr 25, 2019 at 01:28:20PM +0200, Marcin Wojtas wrote:
> > > Hi,
> > >
> > > The third version of the patchset cleans up the dependencies between
> > > the SPI drivers, so that now they explicitly rely on the protocols'
> > > instead of BEFORE statements and modules GUIDs. Also force dependency
> > > between FTW and MvFvbDxe using library NULL resolution.
> > >
> > > The patches are available in the github:
> > > https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/fvb-upstream-r20190425
> > >
> > > I'm looking forward to your comments or remarks.
> > >
> > > Best regards,
> > > Marcin
> > >
> > > Changelog:
> > > v2->v3
> > >
> > > 3/4 (new patch)
> > >  * Clean-up MvSpiFlashDxe / MvSpiOrionDxe / MvFvbDxe dependencies and
> > >    rely on the protocols' GUIDs
> > >
> > > 4/4
> > >  * Force dependency for loading FTW driver
> > >
> > > v1->v2
> > >  * Replace clock-enabling patch with PEI phase FV cleanup
> > >
> > > Hanna Hawa (1):
> > >   Marvell/Drivers: MvFvbDxe: Change Pcd parameters to be 64 bit
> > >
> > > Kornel Duleba (1):
> > >   Marvell/Drivers: MvFvbDxe: Introduce non-mmio mode
> > >
> > > Marcin Wojtas (2):
> > >   Marvell/Armada7k8k: Cleanup PEI phase FV
> > >   Marvell/Drivers/Spi: Improve modules dependencies
> > >
> > >  Silicon/Marvell/Marvell.dec                                 |   7 +-
> > >  Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc               |  18 ++-
> > >  Silicon/Marvell/Armada7k8k/Armada7k8k.fdf                   |   3 -
> > >  Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.inf           |  14 +-
> > >  Silicon/Marvell/Drivers/Spi/MvSpiFlashDxe/MvSpiFlashDxe.inf |   5 +-
> > >  Silicon/Marvell/Drivers/Spi/MvSpiOrionDxe/MvSpiOrionDxe.inf |   5 +-
> > >  Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.h             |   1 +
> > >  Silicon/Marvell/Drivers/Spi/MvFvbDxe/MvFvbDxe.c             | 149 +++++++++++++++-----
> > >  8 files changed, 140 insertions(+), 62 deletions(-)
> > >
> > > --
> > > 2.7.4
> > >

Re: [edk2-platforms: PATCH v3 0/4] Armada7k8k FVB improvements

[Ard Biesheuvel]

On Mon, 29 Apr 2019 at 15:54, Marcin Wojtas <mw@semihalf.com> wrote:
>
> Hi Leif, Ard,
>
> czw., 25 kwi 2019 o 14:35 Marcin Wojtas <mw@semihalf.com> napisał(a):
> >
> > Hi Leif,
> >
> > czw., 25 kwi 2019 o 14:01 Leif Lindholm <leif.lindholm@linaro.org> napisał(a):
> > >
> > > Hi Marcin,
> > >
> > > Just to be awkward - edk2-platforms (and edk2-non-osi) have not yet
> > > been relicensed, so we still need "contributed-under" here.
> > >
> > > For this series, can you confirm to the list that this is indeed
> > > Contributed-under: TianoCore Contribution Agreement 1.1
> > > ? If so, we can fix that up before committing.
> > >
> >
> > Yes, I confirm that - if possible fix-up. Actually I removed those
> > lines right before sending :)
> >
>

Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

Pushed as 304e51ae3579..cee103d37d6b

Thanks! Any updates on the PCI support?

Re: [edk2-platforms: PATCH v3 0/4] Armada7k8k FVB improvements

[Marcin Wojtas]

Hi Ard,

czw., 2 maj 2019 o 13:07 Ard Biesheuvel <ard.biesheuvel@linaro.org> napisał(a):
>
> On Mon, 29 Apr 2019 at 15:54, Marcin Wojtas <mw@semihalf.com> wrote:
> >
> > Hi Leif, Ard,
> >
> > czw., 25 kwi 2019 o 14:35 Marcin Wojtas <mw@semihalf.com> napisał(a):
> > >
> > > Hi Leif,
> > >
> > > czw., 25 kwi 2019 o 14:01 Leif Lindholm <leif.lindholm@linaro.org> napisał(a):
> > > >
> > > > Hi Marcin,
> > > >
> > > > Just to be awkward - edk2-platforms (and edk2-non-osi) have not yet
> > > > been relicensed, so we still need "contributed-under" here.
> > > >
> > > > For this series, can you confirm to the list that this is indeed
> > > > Contributed-under: TianoCore Contribution Agreement 1.1
> > > > ? If so, we can fix that up before committing.
> > > >
> > >
> > > Yes, I confirm that - if possible fix-up. Actually I removed those
> > > lines right before sending :)
> > >
> >
>
> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>
> Pushed as 304e51ae3579..cee103d37d6b
>

Thanks!

> Thanks! Any updates on the PCI support?

I need to spend 2-3h to rebase and test on my boards, I plan to submit
tomorrow. Now I will send a patch allowing to burn images on SD/MMC
from shell, as I have nothing to do with it - I think it will be
helpful.

Best regards,
Marcin