[PATCH edk2-platforms 1/3] Silicon/SynQuacer: describe 96boards LS connector GPIOs via ACPI

["Ard Biesheuvel" <ard.biesheuvel@linaro.org>]

Describe the 96boards LS connector GPIO resources via a new LS96
device object.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
 Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf | 14 ++++++++++++++
 Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl       | 20 ++++++++++++++++++++
 2 files changed, 34 insertions(+)

diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
index 6fbdf4d67a88..0fef8b9ca05b 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
@@ -40,6 +40,7 @@ [Packages]
   EmbeddedPkg/EmbeddedPkg.dec
   MdePkg/MdePkg.dec
   MdeModulePkg/MdeModulePkg.dec
+  Platform/96Boards/96Boards.dec
   Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/NetsecDxe.dec
   Silicon/Socionext/SynQuacer/SynQuacer.dec
 
@@ -63,3 +64,16 @@ [FixedPcd]
   gSynQuacerTokenSpaceGuid.PcdNetsecEepromBase
   gSynQuacerTokenSpaceGuid.PcdNetsecPhyAddress
   gSynQuacerTokenSpaceGuid.PcdPcie0PresenceDetectGpioPin
+
+  g96BoardsTokenSpaceGuid.PcdGpioPinA
+  g96BoardsTokenSpaceGuid.PcdGpioPinB
+  g96BoardsTokenSpaceGuid.PcdGpioPinC
+  g96BoardsTokenSpaceGuid.PcdGpioPinD
+  g96BoardsTokenSpaceGuid.PcdGpioPinE
+  g96BoardsTokenSpaceGuid.PcdGpioPinF
+  g96BoardsTokenSpaceGuid.PcdGpioPinG
+  g96BoardsTokenSpaceGuid.PcdGpioPinH
+  g96BoardsTokenSpaceGuid.PcdGpioPinI
+  g96BoardsTokenSpaceGuid.PcdGpioPinJ
+  g96BoardsTokenSpaceGuid.PcdGpioPinK
+  g96BoardsTokenSpaceGuid.PcdGpioPinL
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl b/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
index acb77739ded6..0702edc06f74 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
@@ -253,5 +253,25 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "SNI", "SYNQUACR",
         Return (0xF)
       }
     }
+
+    Device (LS96) {
+      Name (GPIO, ResourceTemplate () {
+        GpioIo (Exclusive, PullDefault, 0, 0, IoRestrictionNone, "\\_SB.GPIO")
+        {
+          FixedPcdGet32 (PcdGpioPinA),
+          FixedPcdGet32 (PcdGpioPinB),
+          FixedPcdGet32 (PcdGpioPinC),
+          FixedPcdGet32 (PcdGpioPinD),
+          FixedPcdGet32 (PcdGpioPinE),
+          FixedPcdGet32 (PcdGpioPinF),
+          FixedPcdGet32 (PcdGpioPinG),
+          FixedPcdGet32 (PcdGpioPinH),
+          FixedPcdGet32 (PcdGpioPinI),
+          FixedPcdGet32 (PcdGpioPinJ),
+          FixedPcdGet32 (PcdGpioPinK),
+          FixedPcdGet32 (PcdGpioPinL),
+        }
+      })
+    }
   } // Scope (_SB)
 }
-- 
2.20.1