From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=Tfx1HVIw; spf=pass (domain: linaro.org, ip: 209.85.221.66, mailfrom: ard.biesheuvel@linaro.org) Received: from mail-wr1-f66.google.com (mail-wr1-f66.google.com [209.85.221.66]) by groups.io with SMTP; Thu, 25 Apr 2019 05:33:00 -0700 Received: by mail-wr1-f66.google.com with SMTP id b1so18757334wru.3 for ; Thu, 25 Apr 2019 05:33:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=E16qbixQ/QNXLHI+Q4rCaEHu9uIdrPw0KdRVqZqrNmI=; b=Tfx1HVIwwhR7xVW1+TeWSoGhdc1TiJQtuV13l3+vVvzzP82LR9ji9v0WAjMyWSftpR JiEU3U6vo5j/RoxRMXbirug/o3T6nKOYN1y4zcqv8riSAi8dOt2ZhpuEWv/QJfcd7Y1C 2G1/rK5VwxhxKabhqrY9jx7L15ZD151T82KIrCg+UXaGgQ8gt/5yGBgnq8ZmS/zWIPop vVh2AEyeo3mb+IIdEDPF8DRhepClLS522QECpWMzOtb5zH4DmOpmzPg3xS64OS1XBtHx 1W4euOwoYZUQ3rWUL4oFjkEOzC82dARQtcio0mwqWRHO1Levxq8K6B+GmIgBOKe89lmq ZrKg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=E16qbixQ/QNXLHI+Q4rCaEHu9uIdrPw0KdRVqZqrNmI=; b=Mrt6bsK8upCDPV0tUB8g/Ik84YtuTYZiqgYHxuoYOKbJ0j4QyB+cmYjpDPmSvN6bFF s4sggpXXOUdTNtGjJpJnRPw6QRRykOTMgzRrHyV4evbbpOksC1XfrA+aX5MQvTbpOb2T 9TOPFdiBY/PtNLk1vQ7BlwVmPvnv6kcPsi8VMnNcmm+dEtch8MLiwqGSVkmeLOmb1kwM eNKa+y5G3h3DgxlvgW26Wq5Kn8FvisAVbU5V1LsuEQ4OwQ4H4sstnROemgbvAiJq8Ck7 w+ZMTvmmEnzHmUoxEjcmOo66OB1X5kicuE+q/LijVQgLKEyVmTv/VdM+BR0L30SW+EWE rPRQ== X-Gm-Message-State: APjAAAVtYdAJgSZKj+vRu1st+BCYhxXQ9y434j8MS0cZc8EXjGDhyNxx 44oDWGaipICJXUqQaBfxiSW4ttr7seM9HA== X-Google-Smtp-Source: APXvYqwgiuBFjG9DYsT9jqpfmTAxuI+413I4Eqm3CsFHOAiy32WhrTH0ucCp+vCCcE5P+Tv3mHmVhg== X-Received: by 2002:a5d:4483:: with SMTP id j3mr14985117wrq.145.1556195578606; Thu, 25 Apr 2019 05:32:58 -0700 (PDT) Return-Path: Received: from sudo.home ([2a01:cb1d:112:6f00:95f:9014:5be9:5288]) by smtp.gmail.com with ESMTPSA id o6sm43753488wre.60.2019.04.25.05.32.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 25 Apr 2019 05:32:57 -0700 (PDT) From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: leif.lindholm@linaro.org, graeme.gregory@linaro.org, masahisa.kojima@linaro.org, Ard Biesheuvel Subject: [PATCH edk2-platforms 1/3] Silicon/SynQuacer: describe 96boards LS connector GPIOs via ACPI Date: Thu, 25 Apr 2019 14:32:52 +0200 Message-Id: <20190425123254.16396-2-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190425123254.16396-1-ard.biesheuvel@linaro.org> References: <20190425123254.16396-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Describe the 96boards LS connector GPIO resources via a new LS96 device object. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf | 14 ++++++++++++++ Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl | 20 ++++++++++++++++++++ 2 files changed, 34 insertions(+) diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf index 6fbdf4d67a88..0fef8b9ca05b 100644 --- a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf +++ b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf @@ -40,6 +40,7 @@ [Packages] EmbeddedPkg/EmbeddedPkg.dec MdePkg/MdePkg.dec MdeModulePkg/MdeModulePkg.dec + Platform/96Boards/96Boards.dec Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/NetsecDxe.dec Silicon/Socionext/SynQuacer/SynQuacer.dec @@ -63,3 +64,16 @@ [FixedPcd] gSynQuacerTokenSpaceGuid.PcdNetsecEepromBase gSynQuacerTokenSpaceGuid.PcdNetsecPhyAddress gSynQuacerTokenSpaceGuid.PcdPcie0PresenceDetectGpioPin + + g96BoardsTokenSpaceGuid.PcdGpioPinA + g96BoardsTokenSpaceGuid.PcdGpioPinB + g96BoardsTokenSpaceGuid.PcdGpioPinC + g96BoardsTokenSpaceGuid.PcdGpioPinD + g96BoardsTokenSpaceGuid.PcdGpioPinE + g96BoardsTokenSpaceGuid.PcdGpioPinF + g96BoardsTokenSpaceGuid.PcdGpioPinG + g96BoardsTokenSpaceGuid.PcdGpioPinH + g96BoardsTokenSpaceGuid.PcdGpioPinI + g96BoardsTokenSpaceGuid.PcdGpioPinJ + g96BoardsTokenSpaceGuid.PcdGpioPinK + g96BoardsTokenSpaceGuid.PcdGpioPinL diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl b/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl index acb77739ded6..0702edc06f74 100644 --- a/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl +++ b/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl @@ -253,5 +253,25 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "SNI", "SYNQUACR", Return (0xF) } } + + Device (LS96) { + Name (GPIO, ResourceTemplate () { + GpioIo (Exclusive, PullDefault, 0, 0, IoRestrictionNone, "\\_SB.GPIO") + { + FixedPcdGet32 (PcdGpioPinA), + FixedPcdGet32 (PcdGpioPinB), + FixedPcdGet32 (PcdGpioPinC), + FixedPcdGet32 (PcdGpioPinD), + FixedPcdGet32 (PcdGpioPinE), + FixedPcdGet32 (PcdGpioPinF), + FixedPcdGet32 (PcdGpioPinG), + FixedPcdGet32 (PcdGpioPinH), + FixedPcdGet32 (PcdGpioPinI), + FixedPcdGet32 (PcdGpioPinJ), + FixedPcdGet32 (PcdGpioPinK), + FixedPcdGet32 (PcdGpioPinL), + } + }) + } } // Scope (_SB) } -- 2.20.1