From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=fail (domain: intel.com, ip: , mailfrom: michael.d.kinney@intel.com) Received: from mga04.intel.com (mga04.intel.com []) by groups.io with SMTP; Mon, 29 Apr 2019 18:30:16 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Apr 2019 18:30:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,411,1549958400"; d="scan'208";a="139954338" Received: from unknown (HELO mdkinney-MOBL2.amr.corp.intel.com) ([10.241.111.157]) by orsmga006.jf.intel.com with ESMTP; 29 Apr 2019 18:30:15 -0700 From: "Michael D Kinney" To: devel@edk2.groups.io Cc: Eric Dong , Ray Ni , Laszlo Ersek Subject: [Patch V2 4/6] UefiCpuPkg/MpInitLib: Avoid MSR_IA32_APIC_BASE for single core Date: Mon, 29 Apr 2019 18:30:10 -0700 Message-Id: <20190430013012.24008-5-michael.d.kinney@intel.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20190430013012.24008-1-michael.d.kinney@intel.com> References: <20190430013012.24008-1-michael.d.kinney@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Avoid access to MSR_IA32_APIC_BASE that may not be supported on single core CPUs. If PcdCpuMaxLogicalProcessorNumber is 1, then there is only one CPU that must be the BSP. Cc: Eric Dong Cc: Ray Ni Cc: Laszlo Ersek Signed-off-by: Michael D Kinney --- UefiCpuPkg/Library/MpInitLib/PeiMpLib.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c b/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c index 35dff91fd2..5488049c08 100644 --- a/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c @@ -1,7 +1,7 @@ /** @file MP initialize support functions for PEI phase. - Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.
+ Copyright (c) 2016 - 2019, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -101,6 +101,19 @@ GetCpuMpData ( MSR_IA32_APIC_BASE_REGISTER ApicBaseMsr; IA32_DESCRIPTOR Idtr; + // + // If there is only 1 CPU, then it must be the BSP. This avoids an access to + // MSR_IA32_APIC_BASE that may not be supported on single core CPUs. + // + if (PcdGet32 (PcdCpuMaxLogicalProcessorNumber) == 1) { + CpuMpData = GetCpuMpDataFromGuidedHob (); + ASSERT (CpuMpData != NULL); + return CpuMpData; + } + + // + // Otherwise use MSR_IA32_APIC_BASE to determine if the CPU is BSP or AP. + // ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE); if (ApicBaseMsr.Bits.BSP == 1) { CpuMpData = GetCpuMpDataFromGuidedHob (); -- 2.21.0.windows.1