From: "Ard Biesheuvel" <ard.biesheuvel@linaro.org>
To: devel@edk2.groups.io
Cc: leif.lindholm@linaro.org, graeme.gregory@linaro.org,
Ard Biesheuvel <ard.biesheuvel@linaro.org>
Subject: [PATCH edk2-platforms v2 2/2] Platform/Secure96Dxe: add ACPI description of the LEDs and I2C peripherals
Date: Thu, 2 May 2019 11:58:54 +0200 [thread overview]
Message-ID: <20190502095854.6989-3-ard.biesheuvel@linaro.org> (raw)
In-Reply-To: <20190502095854.6989-1-ard.biesheuvel@linaro.org>
Wire up the new 96boards mezzanine SSDT loading support, and use it
to describe the four GPIO LEDs on the Secure96 mezzanine board, as
well as the two ATmel crypto accelerators residing on the I2C bus.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
Platform/96Boards/Secure96Dxe/Secure96.asl | 116 ++++++++++++++++++++
Platform/96Boards/Secure96Dxe/Secure96.h | 8 ++
Platform/96Boards/Secure96Dxe/Secure96Dxe.c | 59 +++++++++-
Platform/96Boards/Secure96Dxe/Secure96Dxe.inf | 1 +
4 files changed, 179 insertions(+), 5 deletions(-)
diff --git a/Platform/96Boards/Secure96Dxe/Secure96.asl b/Platform/96Boards/Secure96Dxe/Secure96.asl
new file mode 100644
index 000000000000..f458929fffb6
--- /dev/null
+++ b/Platform/96Boards/Secure96Dxe/Secure96.asl
@@ -0,0 +1,116 @@
+/** @file
+ * Copyright (c) 2019, Linaro Limited. All rights reserved.
+ *
+ * This program and the accompanying materials are licensed and made
+ * available under the terms and conditions of the BSD License which
+ * accompanies this distribution. The full text of the license may be
+ * found at http://opensource.org/licenses/bsd-license.php
+ *
+ * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
+ * IMPLIED.
+ */
+
+#include "Secure96.h"
+
+DefinitionBlock ("Secure96.aml", "SSDT", 2, "96BRDS", "SECURE96", 1)
+{
+ Scope (_SB)
+ {
+ Device (LD96)
+ {
+ Name (_HID, "LNRO9601")
+ Name (_UID, 0x0)
+ Name (_CID, "PRP0001")
+ Name (_DSD, Package () {
+ ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () { Package () { "compatible", "gpio-leds" }, }
+ })
+ Name (_CRS, ResourceTemplate() {
+ GpioIo (Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, SECURE96_ACPI_GPIO)
+ {
+ FixedPcdGet32 (PcdGpioPinG),
+ FixedPcdGet32 (PcdGpioPinF),
+ FixedPcdGet32 (PcdGpioPinI),
+ FixedPcdGet32 (PcdGpioPinH),
+ }
+ })
+
+ Device (LDU1)
+ {
+ Name (_ADR, 0x1)
+ Name (_DSD, Package () {
+ ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "label", "secure96-u1" },
+ Package () { "gpios", Package () { ^^LD96, 0, 0, 0 }, },
+ }
+ })
+ }
+
+ Device (LDU2)
+ {
+ Name (_ADR, 0x2)
+ Name (_DSD, Package () {
+ ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "label", "secure96-u2" },
+ Package () { "gpios", Package () { ^^LD96, 0, 1, 0 }, },
+ }
+ })
+ }
+
+ Device (LDU3)
+ {
+ Name (_ADR, 0x3)
+ Name (_DSD, Package () {
+ ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "label", "secure96-u3" },
+ Package () { "gpios", Package () { ^^LD96, 0, 2, 0 }, },
+ }
+ })
+ }
+
+ Device (LDU4)
+ {
+ Name (_ADR, 0x4)
+ Name (_DSD, Package () {
+ ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "label", "secure96-u4" },
+ Package () { "gpios", Package () { ^^LD96, 0, 3, 0 }, },
+ }
+ })
+ }
+ }
+
+ Device (SH96)
+ {
+ Name (_HID, "LNRO9602")
+ Name (_UID, 0x0)
+ Name (_CID, "PRP0001")
+ Name (_DSD, Package () {
+ ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () { Package () { "compatible", "atmel,atsha204a" }, }
+ })
+ Name (_CRS, ResourceTemplate() {
+ I2CSerialBus (ATSHA204A_SLAVE_ADDRESS,, 100000,, SECURE96_ACPI_I2C0,,,,)
+ })
+ }
+
+ Device (EC96)
+ {
+ Name (_HID, "LNRO9603")
+ Name (_UID, 0x0)
+ Name (_CID, "PRP0001")
+ Name (_DSD, Package () {
+ ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () { Package () { "compatible", "atmel,atecc508a" }, }
+ })
+ Name (_CRS, ResourceTemplate() {
+ I2CSerialBus (ATECC508A_SLAVE_ADDRESS,, 100000,, SECURE96_ACPI_I2C0,,,,)
+ })
+ }
+ }
+}
diff --git a/Platform/96Boards/Secure96Dxe/Secure96.h b/Platform/96Boards/Secure96Dxe/Secure96.h
index 84b8aed13d1e..a44dc4804f92 100644
--- a/Platform/96Boards/Secure96Dxe/Secure96.h
+++ b/Platform/96Boards/Secure96Dxe/Secure96.h
@@ -23,4 +23,12 @@
#define INFINEON_SLB9670_SPI_CS 0x0
#define INFINEON_SLB9670_DT_NODENAME tpm@0
+#ifndef SECURE96_ACPI_GPIO
+#define SECURE96_ACPI_GPIO "\\_SB.GPIO"
+#endif
+
+#ifndef SECURE96_ACPI_I2C0
+#define SECURE96_ACPI_I2C0 "\\_SB.I2C0"
+#endif
+
#endif // _SECURE96_H_
diff --git a/Platform/96Boards/Secure96Dxe/Secure96Dxe.c b/Platform/96Boards/Secure96Dxe/Secure96Dxe.c
index 6c48d7c0b024..68f8ec812b52 100644
--- a/Platform/96Boards/Secure96Dxe/Secure96Dxe.c
+++ b/Platform/96Boards/Secure96Dxe/Secure96Dxe.c
@@ -24,6 +24,8 @@
#include "Secure96.h"
+#define SECURE96_SSDT_OEM_TABLE_ID SIGNATURE_64('S','E','C','U','R','E','9','6')
+
STATIC CONST UINT32 mI2cAtmelSha204aSlaveAddress[] = {
ATSHA204A_SLAVE_ADDRESS,
@@ -148,15 +150,20 @@ ApplyDeviceTreeOverlay (
UINTN OverlaySize;
EFI_STATUS Status;
INT32 Err;
+ UINTN Index;
//
// Load the raw overlay DTB image from the raw section of this FFS file.
//
- Status = GetSectionFromFv (&gEfiCallerIdGuid,
- EFI_SECTION_RAW, 0, &Overlay, &OverlaySize);
- ASSERT_EFI_ERROR (Status);
- if (EFI_ERROR (Status)) {
- return EFI_NOT_FOUND;
+ for (Index = 0;; Index++) {
+ Status = GetSectionFromFv (&gEfiCallerIdGuid,
+ EFI_SECTION_RAW, Index, &Overlay, &OverlaySize);
+ if (EFI_ERROR (Status)) {
+ return EFI_NOT_FOUND;
+ }
+ if (!fdt_check_header (Overlay)) {
+ break;
+ }
}
//
@@ -177,8 +184,50 @@ ApplyDeviceTreeOverlay (
return EFI_SUCCESS;
}
+/**
+ Install the mezzanine's SSDT table
+
+ @param[in] This Pointer to the MEZZANINE_PROTOCOL instance.
+ @param[in] Dtb Pointer to the device tree blob
+
+ @return EFI_SUCCESS Operation succeeded.
+ @return other An error has occurred.
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+InstallSsdtTable (
+ IN MEZZANINE_PROTOCOL *This,
+ IN EFI_ACPI_TABLE_PROTOCOL *AcpiProtocol
+ )
+{
+ EFI_ACPI_DESCRIPTION_HEADER *Ssdt;
+ UINTN SsdtSize;
+ EFI_STATUS Status;
+ UINTN Index;
+ UINTN TableKey;
+
+ //
+ // Load SSDT table from the raw section of this FFS file.
+ //
+ for (Index = 0;; Index++) {
+ Status = GetSectionFromFv (&gEfiCallerIdGuid, EFI_SECTION_RAW, Index,
+ (VOID **)&Ssdt, &SsdtSize);
+ if (EFI_ERROR (Status)) {
+ return EFI_NOT_FOUND;
+ }
+ if (SsdtSize >= sizeof (EFI_ACPI_DESCRIPTION_HEADER) &&
+ Ssdt->OemTableId == SECURE96_SSDT_OEM_TABLE_ID) {
+ break;
+ }
+ }
+ return AcpiProtocol->InstallAcpiTable (AcpiProtocol, Ssdt, SsdtSize,
+ &TableKey);
+}
+
STATIC MEZZANINE_PROTOCOL mMezzanine = {
ApplyDeviceTreeOverlay,
+ InstallSsdtTable,
ARRAY_SIZE (mI2c0Devices),
0,
mI2c0Devices,
diff --git a/Platform/96Boards/Secure96Dxe/Secure96Dxe.inf b/Platform/96Boards/Secure96Dxe/Secure96Dxe.inf
index 72dbf1314c15..ce4c8b5f8fa5 100644
--- a/Platform/96Boards/Secure96Dxe/Secure96Dxe.inf
+++ b/Platform/96Boards/Secure96Dxe/Secure96Dxe.inf
@@ -21,6 +21,7 @@ [Defines]
ENTRY_POINT = Secure96DxeEntryPoint
[Sources]
+ Secure96.asl
Secure96.dts
Secure96.h
Secure96Dxe.c
--
2.20.1
next prev parent reply other threads:[~2019-05-02 9:59 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-02 9:58 [PATCH edk2-platforms v2 0/2] enable Secure96 mezzanine on ACPI systems Ard Biesheuvel
2019-05-02 9:58 ` [PATCH edk2-platforms v2 1/2] Platform/96Boards: add ACPI support to mezzanine/LS connector driver Ard Biesheuvel
2019-05-02 9:58 ` Ard Biesheuvel [this message]
2019-05-02 15:40 ` [PATCH edk2-platforms v2 0/2] enable Secure96 mezzanine on ACPI systems Leif Lindholm
2019-05-03 14:06 ` Ard Biesheuvel
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