From: "Chiu, Chasel" <chasel.chiu@intel.com>
To: devel@edk2.groups.io
Cc: "Chasel, Chiu" <chasel.chiu@intel.com>,
Nate DeSimone <nathaniel.l.desimone@intel.com>,
Michael Kubacki <michael.a.kubacki@intel.com>
Subject: [PATCH 2/2] KabylakeOpenBoardPkg: Add FSP Dispatch switch.
Date: Wed, 22 May 2019 16:35:10 +0800 [thread overview]
Message-ID: <20190522083510.17476-3-chasel.chiu@intel.com> (raw)
In-Reply-To: <20190522083510.17476-1-chasel.chiu@intel.com>
From: "Chasel, Chiu" <chasel.chiu@intel.com>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1832
Basing on PcdFspModeSelection setting either KabylakeFspBinPkg
or AmberLakeFspBinPkg will be used and temporary memory
arrangement will be different as AmberLakeFspBinPkg will share
the same stack with boot loader. Also enlarged FSP-T size to
support future larger FSP binary.
Test: Booted Kabylake RVP3 to Windows successfully.
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Michael Kubacki <michael.a.kubacki@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
---
Platform/Intel/KabylakeOpenBoardPkg/Include/Fdf/FlashMapInclude.fdf | 8 ++++----
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc | 33 +++++++++++++++++++++++++++++----
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc | 29 +++++++++++++++++++++++++++++
3 files changed, 62 insertions(+), 8 deletions(-)
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/Include/Fdf/FlashMapInclude.fdf b/Platform/Intel/KabylakeOpenBoardPkg/Include/Fdf/FlashMapInclude.fdf
index 3a28bd4109..6cb49c941c 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/Include/Fdf/FlashMapInclude.fdf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/Include/Fdf/FlashMapInclude.fdf
@@ -1,7 +1,7 @@
## @file
# FDF file of Platform.
#
-# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -41,6 +41,6 @@ SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize = 0x00060000
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = 0x00600000 # Flash addr (0xFFE00000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize = 0x000BC000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset = 0x006BC000 # Flash addr (0xFFEBC000)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize = 0x00004000 #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset = 0x006C0000 # Flash addr (0xFFEC0000)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize = 0x00140000 #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize = 0x00014000 #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset = 0x006D0000 # Flash addr (0xFFED0000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize = 0x00130000 #
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
index 7f19ad1eed..1dfe49a7ad 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
@@ -15,7 +15,7 @@
DEFINE PLATFORM_PACKAGE = MinPlatformPkg
DEFINE PLATFORM_SI_PACKAGE = KabylakeSiliconPkg
DEFINE PLATFORM_SI_BIN_PACKAGE = KabylakeSiliconBinPkg
- DEFINE PLATFORM_FSP_BIN_PACKAGE = KabylakeFspBinPkg
+ DEFINE PLATFORM_FSP_BIN_PACKAGE = AmberLakeFspBinPkg
DEFINE PLATFORM_BOARD_PACKAGE = KabylakeOpenBoardPkg
DEFINE BOARD = KabylakeRvp3
DEFINE PROJECT = $(PLATFORM_BOARD_PACKAGE)/$(BOARD)
@@ -24,6 +24,21 @@
# Platform On/Off features are defined here
#
!include OpenBoardPkgConfig.dsc
+ !include OpenBoardPkgPcd.dsc
+
+[Defines]
+!if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1
+ #
+ # For backward compatibility API mode will use KabylakeFspBinPkg.
+ # KabylakeFspBinPkg only supports API mode.
+ #
+ DEFINE PLATFORM_FSP_BIN_PACKAGE = KabylakeFspBinPkg
+!else
+ #
+ # AmberLakeFspBinPkg supports both API and Dispatch modes
+ #
+ DEFINE PLATFORM_FSP_BIN_PACKAGE = AmberLakeFspBinPkg
+!endif
################################################################################
#
@@ -92,8 +107,20 @@
FspWrapperApiTestLib|IntelFsp2WrapperPkg/Library/PeiFspWrapperApiTestLib/PeiFspWrapperApiTestLib.inf
FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiFspWrapperPlatformLib/PeiFspWrapperPlatformLib.inf
- SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInitLibFsp/PeiSiliconPolicyInitLibFsp.inf
+
+!if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1
+ #
+ # Below library are used by FSP API mode
+ #
SiliconPolicyUpdateLib|$(PLATFORM_BOARD_PACKAGE)/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf
+ SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInitLibFsp/PeiSiliconPolicyInitLibFsp.inf
+!else
+ #
+ # Below library are used by FSP Dispatch mode and non-FSP build (EDK2 build)
+ #
+ SiliconPolicyUpdateLib|$(PLATFORM_BOARD_PACKAGE)/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
+ SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInitLibFsp/PeiSiliconPolicyInitLibFspAml.inf
+!endif
ConfigBlockLib|$(PLATFORM_SI_PACKAGE)/Library/BaseConfigBlockLib/BaseConfigBlockLib.inf
SiliconInitLib|$(PLATFORM_SI_PACKAGE)/Library/SiliconInitLib/SiliconInitLib.inf
@@ -173,8 +200,6 @@
[LibraryClasses.X64.DXE_RUNTIME_DRIVER]
ResetSystemLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/DxeRuntimeResetSystemLib/DxeRuntimeResetSystemLib.inf
-!include OpenBoardPkgPcd.dsc
-
[Components.IA32]
#
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc
index 9774acb5eb..63d0c4c2e6 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc
@@ -28,6 +28,11 @@
[PcdsFixedAtBuild.common]
gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode|TRUE
+ #
+ # 0: FSP Wrapper is running in Dispatch mode.
+ # 1: FSP Wrapper is running in API mode.
+ #
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|1
!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0x1
@@ -49,9 +54,33 @@
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase|0xFEF00000
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize|0x00040000
+!if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1
+ #
+ # FSP API mode is backward compatible with earlier FSP which
+ # does not share stack with boot loader, so FSP needs more
+ # temporary memory for FSP heap + stack size.
+ #
gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize | 0x00026000
+ #
+ # In FSP API mode, FSP and boot loader runnig on different stack
+ # so no need to enlarge boot loader stack size.
+ #
gSiPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x20000
+!else
+ #
+ # FSP Dispatch mode will share the same stack with boot loader,
+ # here temporary ram size is used by FSP heap and can be smaller
+ #
+ gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize | 0x00010000
+
+ #
+ # In FSP Dispatch mode boot loader stack size must be big enough for executing
+ # both boot loader and FSP.
+ #
+ gSiPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x40000
+!endif
+
gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x5000
gEfiMdeModulePkgTokenSpaceGuid.PcdHwErrStorageSize|0x00000800
gEfiMdeModulePkgTokenSpaceGuid.PcdMaxHardwareErrorVariableSize|0x400
--
2.13.3.windows.1
next prev parent reply other threads:[~2019-05-22 8:35 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-22 8:35 [PATCH 0/2] Add FSP Dispatch mode switch Chiu, Chasel
2019-05-22 8:35 ` [PATCH 1/2] KabylakeSiliconPkg: Add FSP Dispatch switch Chiu, Chasel
2019-05-29 1:12 ` [edk2-devel] " Nate DeSimone
2019-05-22 8:35 ` Chiu, Chasel [this message]
2019-05-29 1:12 ` [PATCH 2/2] KabylakeOpenBoardPkg: " Nate DeSimone
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