From: "Gao, Zhichao" <zhichao.gao@intel.com>
To: devel@edk2.groups.io
Cc: Eric Dong <eric.dong@intel.com>, Ray Ni <ray.ni@intel.com>,
Laszlo Ersek <lersek@redhat.com>,
Liming Gao <liming.gao@intel.com>,
Sean Brogan <sean.brogan@microsoft.com>,
Michael Turner <Michael.Turner@microsoft.com>,
Bret Barkelew <Bret.Barkelew@microsoft.com>
Subject: [PATCH 5/6] UefiCpuPkg/CpuDxe: Implement Cpu2 protocol
Date: Fri, 24 May 2019 13:04:36 +0800 [thread overview]
Message-ID: <20190524050437.38616-6-zhichao.gao@intel.com> (raw)
In-Reply-To: <20190524050437.38616-1-zhichao.gao@intel.com>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1400
Implement Cp2 protocol: it has one interface to enable the
interrupt and put cpu to sleep and wait for an interrupt.
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Michael Turner <Michael.Turner@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
---
UefiCpuPkg/CpuDxe/CpuDxe.c | 40 +++++++++++++++++++++++++++++++++++-
UefiCpuPkg/CpuDxe/CpuDxe.h | 15 ++++++++++++++
UefiCpuPkg/CpuDxe/CpuDxe.inf | 3 ++-
3 files changed, 56 insertions(+), 2 deletions(-)
diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.c b/UefiCpuPkg/CpuDxe/CpuDxe.c
index 7d7270e10b..0d0cdf6f86 100644
--- a/UefiCpuPkg/CpuDxe/CpuDxe.c
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.c
@@ -1,7 +1,7 @@
/** @file
CPU DXE Module to produce CPU ARCH Protocol.
- Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -18,6 +18,7 @@
//
BOOLEAN InterruptState = FALSE;
EFI_HANDLE mCpuHandle = NULL;
+EFI_HANDLE mCpu2Handle = NULL;
BOOLEAN mIsFlushingGCD;
BOOLEAN mIsAllocatingPageTable = FALSE;
UINT64 mValidMtrrAddressMask;
@@ -96,6 +97,10 @@ EFI_CPU_ARCH_PROTOCOL gCpu = {
4 // DmaBufferAlignment
};
+EFI_CPU2_PROTOCOL gCpu2 = {
+ CpuEnableAndWaitForInterrupt
+};
+
//
// CPU Arch Protocol Functions
//
@@ -499,6 +504,28 @@ CpuSetMemoryAttributes (
return AssignMemoryPageAttributes (NULL, BaseAddress, Length, MemoryAttributes, NULL);
}
+//
+// CPU2 Protocol Functions
+//
+/**
+ This function enables CPU interrupts and then waits for an interrupt to arrive.
+
+ @param This The EFI_CPU2_PROTOCOL instance.
+
+ @retval EFI_SUCCESS Interrupts are enabled on the processor.
+ @retval EFI_DEVICE_ERROR Interrupts could not be enabled on the processor.
+
+**/
+EFI_STATUS
+CpuEnableAndWaitForInterrupt (
+ IN EFI_CPU2_PROTOCOL *This
+ )
+{
+ EnableInterruptsAndSleep ();
+
+ return EFI_SUCCESS;
+}
+
/**
Initializes the valid bits mask and valid address mask for MTRRs.
@@ -1211,6 +1238,17 @@ InitializeCpu (
);
ASSERT_EFI_ERROR (Status);
+ //
+ // Install CPU2 Protocol
+ //
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &mCpu2Handle,
+ &gEfiCpu2ProtocolGuid,
+ &gCpu2,
+ NULL
+ );
+ ASSERT_EFI_ERROR (Status);
+
InitializeMpSupport ();
return Status;
diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.h b/UefiCpuPkg/CpuDxe/CpuDxe.h
index b029be430b..8698ff78eb 100644
--- a/UefiCpuPkg/CpuDxe/CpuDxe.h
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.h
@@ -12,6 +12,7 @@
#include <PiDxe.h>
#include <Protocol/Cpu.h>
+#include <Protocol/Cpu2.h>
#include <Protocol/MpService.h>
#include <Register/Msr.h>
@@ -305,6 +306,20 @@ PageFaultExceptionHandler (
IN EFI_SYSTEM_CONTEXT SystemContext
);
+/**
+ This function enables CPU interrupts and then waits for an interrupt to arrive.
+
+ @param This The EFI_CPU2_PROTOCOL instance.
+
+ @retval EFI_SUCCESS Interrupts are enabled on the processor.
+ @retval EFI_DEVICE_ERROR Interrupts could not be enabled on the processor.
+
+**/
+EFI_STATUS
+CpuEnableAndWaitForInterrupt (
+ IN EFI_CPU2_PROTOCOL *This
+ );
+
extern BOOLEAN mIsAllocatingPageTable;
extern UINTN mNumberOfProcessors;
diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.inf b/UefiCpuPkg/CpuDxe/CpuDxe.inf
index 57381dbc85..d4ff562d89 100644
--- a/UefiCpuPkg/CpuDxe/CpuDxe.inf
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.inf
@@ -1,7 +1,7 @@
## @file
# CPU driver installs CPU Architecture Protocol and CPU MP protocol.
#
-# Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -62,6 +62,7 @@
gEfiCpuArchProtocolGuid ## PRODUCES
gEfiMpServiceProtocolGuid ## PRODUCES
gEfiSmmBase2ProtocolGuid ## SOMETIMES_CONSUMES
+ gEfiCpu2ProtocolGuid ## PRODUCES
[Guids]
gIdleLoopEventGuid ## CONSUMES ## Event
--
2.21.0.windows.1
next prev parent reply other threads:[~2019-05-24 5:04 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-24 5:04 [PATCH 0/6] Fix race condition and add event protocol Gao, Zhichao
2019-05-24 5:04 ` [PATCH 1/6] MdeModulePkg: Add gEdkiiCommonEventProtocolGuid for event Gao, Zhichao
2019-05-24 5:04 ` [PATCH 2/6] MdePkg/BaseLib.h: Add EnableInterruptsAndSleep function declare Gao, Zhichao
2019-05-24 5:04 ` [PATCH 3/6] MdePkg/BaseLib: Implement EnableInterruptsAndSleep Gao, Zhichao
2019-05-24 5:04 ` [PATCH 4/6] MdePkg: Add gEfiCpu2ProtocolGuid and header file Gao, Zhichao
2019-05-24 5:20 ` Liming Gao
2019-05-24 5:27 ` Gao, Zhichao
2019-05-24 5:34 ` [edk2-devel] " Yao, Jiewen
2019-05-24 5:38 ` Yao, Jiewen
2019-05-24 6:02 ` Liming Gao
2019-05-24 7:48 ` Gao, Zhichao
2019-05-24 5:04 ` Gao, Zhichao [this message]
2019-05-24 5:04 ` [PATCH 6/6] MdeModulePkg/DxeMain: Implement common event protocol Gao, Zhichao
2019-05-24 5:17 ` [PATCH 0/6] Fix race condition and add " Ni, Ray
2019-05-24 7:47 ` Gao, Zhichao
2019-05-24 9:43 ` [edk2-devel] " Laszlo Ersek
2019-05-24 12:52 ` Felix Polyudov
2019-06-13 16:22 ` Liming Gao
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